AM79C976 datasheet(165/309 Pages) AMD

165 / 309 page

8/01/00

Am79C976

165

P R E L I M INARY

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5HJLVWHU

Offset 1B8h

This register is an alias of the PMC register located at

offset 42h of the PCI Configuration Space. Since the

PMC register is read only, this register provides a

means of programming it through the EEPROM. For

the definition of the bits in this register, refer to the PMC

The contents of this register are set to the default value

of 0C802h when the RST pin is asserted, before the

serial EEPROM is read, and after a serial EEPROM

read error.

5HFHLYH 3URWHFW 5HJLVWHU

Offset 0DCh

The contents of this register are set to the default value

64 when the RST pin is asserted. This register is not af-

fected by the serial EEPROM read operation or by a se-

rial EEPROM read error.

Table 72. Receive Protect Register

5&9B5,1*B/(15HFHLYH 5LQJ/HQJWK5HJLVWHU

Offset 150h

The contents of this register are set to the default value

0 when the RST pin is asserted. This register is not af-

fected by the serial EEPROM read operation or by a

serial EEPROM read error.

Table 73. RCV_RING_LEN: Receive Ring Length Register

Bit

Name

Description

15-0

RCV_

PROTECT

Receive Protect. This register indicates the number of bytes of an incoming frame that must be

received before the DMA controller starts to copy the frame data into the host system memory. If

the size of the frame (in bytes) is less than the contents of this register and the frame contains a

valid FCS, the DMA transfer can start any time after the end of the frame is received.

The Receive Protect Register also determines the period during which the External Address Reject

(EAR) pin is monitored when the External Address Detection Interface (EADI) is used. The state of

the EAR pin is ignored except for a period of time that starts when the Start of Frame Delimiter of

an incoming frame is received and ends when the number of frame data bytes indicated by the

Receive Protect Register have been received.

Bit

Name

Description

15-0

RCV_RING_

LEN

Receive Ring Length. Contains the two’s complement of the receive descriptor ring length. This

value in the RLEN field of the initialization block. However, this register can be manually altered.

The actual receive ring length is defined by the current value in this register. The ring length can

be defined as any value from 1 to 65535.

This register is an alias of CSR76.

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