AM79C976 datasheet(162/309 Pages) AMD

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162

Am79C976

8/01/00

P R E L I M INARY

This register is an alias of BCR38.

The contents of this register are cleared to 0 when the

RST pin is asserted, before the serial EEPROM is

read, and after a serial EEPROM read error.

3&,'$7$3&, '$7$ 5HJLVWHU7ZR$OLDV5HJLVWHU

Offset 1C0h

This register is identical to the PCI Data Register Zero

Alias Register except that it contains the data that ap-

pears in the DATA_SCALE field of the PCI Power Man-

agement Control/Status Register (PMCSR) and the

PCI Data Register when the DATA_SEL field of

PMCSR is set to 2.

This register is an alias of BCR39.

The contents of this register are cleared to 0 when the

RST pin is asserted, before the serial EEPROM is

read, and after a serial EEPROM read error.

3&,'$7$ 3&, '$7$ 5HJLVWHU 7KUHH $OLDV 5HJLVWHU

Offset 1C2h

This register is identical to the PCI Data Register Zero

Alias Register except that it contains the data that ap-

pears in the DATA_SCALE field of the PCI Power Man-

agement Control/Status Register (PMCSR) and the

PCI Data Register when the DATA_SEL field of

PMCSR is set to 3.

This register is an alias of BCR40.

The contents of this register are cleared to 0 when the

RST pin is asserted, before the serial EEPROM is

read, and after a serial EEPROM read error.

3&,'$7$3&, '$7$ 5HJLVWHU)RXU $OLDV 5HJLVWHU

Offset 1C4h

This register is identical to the PCI Data Register Zero

Alias Register except that it contains the data that ap-

pears in the DATA_SCALE field of the PCI Power Man-

agement Control/Status Register (PMCSR) and the

PCI Data Register when the DATA_SEL field of

PMCSR is set to 4.

This register is an alias of BCR41.

The contents of this register are cleared to 0 when the

RST pin is asserted, before the serial EEPROM is

read, and after a serial EEPROM read error.

3&,'$7$3&,'$7$ 5HJLVWHU)LYH$OLDV5HJLVWHU

Offset 1C6h

This register is identical to the PCI Data Register Zero

Alias Register except that it contains the data that ap-

pears in the DATA_SCALE field of the PCI Power Man-

agement Control/Status Register (PMCSR) and the

PCI Data Register when the DATA_SEL field of

PMCSR is set to 5.

This register is an alias of BCR42.

The contents of this register are cleared to 0 when the

RST pin is asserted, before the serial EEPROM is

read, and after a serial EEPROM read error.

3&,'$7$3&,'$7$ 5HJLVWHU6L[ $OLDV 5HJLVWHU

Offset 1C8h

This register is identical to the PCI Data Register Zero

Alias Register except that it contains the data that ap-

pears in the DATA_SCALE field of the PCI Power Man-

agement Control/Status Register (PMCSR) and the

PCI Data Register when the DATA_SEL field of

PMCSR is set to 6.

This register is an alias of BCR43.

The contents of this register are cleared to 0 when the

RST pin is asserted, before the serial EEPROM is

read, and after a serial EEPROM read error.

3&,'$7$3&,'$7$ 5HJLVWHU6HYHQ$OLDV

5HJLVWHU

Offset 1CAh

This register is identical to the PCI Data Register Zero

Alias Register except that it contains the data that ap-

pears in the DATA_SCALE field of the PCI Power Man-

agement Control/Status Register (PMCSR) and the

PCI Data Register when the DATA_SEL field of

PMCSR is set to 7.

This register is an alias of BCR44.

The contents of this register are cleared to 0 when the

RST pin is asserted, before the serial EEPROM is

read, and after a serial EEPROM read error.

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