AM79C976 datasheet(167/309 Pages) AMD

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8/01/00

Am79C976

167

P R E L I M INARY

SRAM Boundary Register

Offset 17Ah

All bits in this register are cleared to 0 when the RST

pin is asserted, before the serial EEPROM is read, and

after a serial EEPROM read error.

Table 76. SRAM Boundary Register

65$0 6L]H 5HJLVWHU

Offset 178h

All bits in this register are cleared to 0 when the RST

pin is asserted, before the serial EEPROM is read, and

after a serial EEPROM read error.

Table 77. SRAM Size Register

Bit

Name

Description

15-0

SRAM_BND

SRAM Boundary. Specifies the size of the transmit buffer portion of the SRAM in units of 512-byte

pages. For example, if SRAM_BND is set to 10, then 5120 bytes of the SRAM will be allocated for

the transmit buffer and the rest will be allocated for the receive buffer.

The transmit buffer in the SRAM begins at address 0 and ends at the address (SRAM_BND*512)-

1. Therefore, the receive buffer always begins on a 512-byte boundary.

SRAM_BND must be initialized to an appropriate value, either by the EEPROM or by the host CPU.

SRAM_BND must be set to a value less than or equal to IFFCh. Values larger than IFFCh will

cause incorrect behavior.

Note: The minimum allowed number of pages for normal network operation is four, and the

maximum is SRAM_SIZE - 4.

This register is an alias of BCR26.

Bit

Name

Description

15-0

SRAM_SIZE

SRAM Size. Specifies the total size of the SSRAM buffer in units of 512-byte pages. For example,

assume that the external memory consists of one 64K X 32 bit SSRAM, for a total of 256K bytes.

In this case SRAM_SIZE should be set to 512 (256K divided by 512).

This field must be initialized to the appropriate value, either by the EEPROM or by the host CPU.

SRAM_SIZE must be set to a value less than or equal to 2000h. Values larger than 2000h will

cause incorrect behavior.

Note: The minimum allowed number of pages is eight for normal network operation.

This register is an alias of BCR25.

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