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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM79C970A датащи(PDF) 170 Page - Advanced Micro Devices |
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AM79C970A датащи(HTML) 170 Page - Advanced Micro Devices |
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170 / 219 page  AMD P R E L I M I N A R Y 170 Am79C970A Control and Status Registers RAP Addr Symbol Default Value Comments Use 00 CSR0 uuuu 0004 PCnet-PCI II Controller Status Register R 01 CSR1 uuuu uuuu Lower IADR]: Maps to Location 16 S 02 CSR2 uuuu uuuu Upper IADR: Maps to Location 17 S 03 CSR3 uuuu 0000 Interrupt Masks and Deferral Control S 04 CSR4 uuuu 0115 Test and Features Control R 05 CSR5 uuuu 0000 Extended Control and Interrupt R 06 CSR6 uuuu uuuu RXTX: RX/TX Encoded Ring Lengths S 07 CSR7 uuuu uuuu Reserved 08 CSR8 uuuu uuuu LADR0: Logical Address Filter — LADRF[15:0] S 09 CSR9 uuuu uuuu LADR1: Logical Address Filter — LADRF[31:16] S 10 CSR10 uuuu uuuu LADR2: Logical Address Filter — LADRF[47:32] S 11 CSR11 uuuu uuuu LADR3: Logical Address Filter — LADRF[63:48] S 12 CSR12 uuuu uuuu PADR0: Physical Address Register — PADR[15:0][ S 13 CSR13 uuuu uuuu PADR1: Physical Address Register — PADR[31:16] S 14 CSR14 uuuu uuuu PADR2: Physical Address Register — PADR[47:32] S 15 CSR15 see reg. desc. MODE: Mode Register S 16 CSR16 uuuu uuuu IADR[15:0]: Base Address of INIT Block Lower (Copy) T 17 CSR17 uuuu uuuu IADR[31:16]: Base Address of INIT Block Upper (Copy) T 18 CSR18 uuuu uuuu CRBAL: Current Receive Buffer Address Lower T 19 CSR22 uuuu uuuu CRBAU: Current Receive Buffer Address Upper T 20 CSR20 uuuu uuuu CXBAL: Current Transmit Buffer Address Lower T 21 CSR21 uuuu uuuu CXBAU: Current Transmit Buffer Address Upper T 22 CSR22 uuuu uuuu NRBAL: Next Receive Buffer Address Lower T 23 CSR23 uuuu uuuu NRBAU: Next Receive Buffer Address Upper T 24 CSR24 uuuu uuuu BADRL: Base Address of Receive Ring Lower S 25 CSR25 uuuu uuuu BADRU: Base Address of Receive Ring Upper S 26 CSR26 uuuu uuuu NRDAL: Next Receive Descriptor Address Lower T 27 CSR27 uuuu uuuu NRDAU: Next Receive Descriptor Address Upper T 28 CSR28 uuuu uuuu CRDAL: Current Receive Descriptor Address Lower T 29 CSR29 uuuu uuuu CRDAU: Current Receive Descriptor Address Upper T 30 CSR30 uuuu uuuu BADXL: Base Address of Transmit Descriptor Ring Lower S 31 CSR31 uuuu uuuu BADXU: Base Address of Transmit Descriptor Ring Upper S 32 CSR32 uuuu uuuu NXDAL: Next XMT Descriptor Address Lower T 33 CSR33 uuuu uuuu NXDAU: Next XMT Descriptor Address Upper T 34 CSR34 uuuu uuuu CXDAL: Current Transmit Descriptor Address Lower T 35 CSR35 uuuu uuuu CXDAU: Current Transmit Descriptor Address Upper T 36 CSR36 uuuu uuuu NNRDAL: Next Next Receive Descriptor Address Lower T 37 CSR37 uuuu uuuu NNRDAU: Next Next Receive Descriptor Address Upper T Note: u = undefined value, R = Running register, S = Setup register, T = Test register |
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