AM79C970A datasheet(155/219 Pages) AMD

155 / 219 page

P R E L I M I N A R Y

AMD

155

Am79C970A

ble BCR locations will be reset to

their

H_RESET

values.

The

contents of the Address PROM

locations,

however,

will

not

be cleared.

If the EEPROM detection fails,

then

all

attempted

PREAD

commands will terminate early

and PVALID will not be set. This

applies to the automatic read of

the EEPROM after H_RESET

well

host-initiated

PREAD commands.

Read accessible only. PVALID is

read only. Write operations have

no effect. PVALID is cleared to

ZERO during H_RESET and is

unaffected by S_RESET or by

setting the STOP bit.

PREAD

EEPROM Read command bit.

When this bit is set to ONE by the

host, the PVALID bit (BCR19, bit

15) will immediately be cleared to

ZERO and then the PCnet-PCI II

controller will perform a read op-

eration of 36 bytes from the

EEPROM through the Microwire

interface. The EEPROM data

that is fetched during the read

will be stored in the appropriate

internal

registers

board

the

PCnet-PCI

controller.

EEPROM contents will be indi-

rectly accessible to the host

through read accesses to the Ad-

dress PROM (offsets 0h through

Fh) and through read accesses

to the EEPROM-programmable

BCRs. Note that read accesses

from these locations will not actu-

ally access the EEPROM itself,

but

instead

will

access

the

PCnet-PCI II controller’s internal

copy of the EEPROM contents.

Write accesses to these loca-

tions may change the PCnet-PCI

II controller register contents, but

the EEPROM locations will not

be affected. EEPROM locations

may also be accessed directly

by programming bits 4–0 of

this register.

At the end of the read operation,

the PREAD bit will automatically

cleared

ZERO

the PCnet-PCI II controller and

PVALID will be set, provided that

an EEPROM existed on the

Microwire interface pins and that

the checksum for the entire 36

bytes of EEPROM was correct.

Note that when PREAD is set to

ONE, the PCnet-PCI II controller

will no longer respond to any ac-

cesses directed toward it, until

the

PREAD

operation

has

completed

successfully.

The

PCnet-PCI II controller will termi-

nate these accesses with the

assertion of

DEVSEL and STOP

while

TRDY is not asserted, sig-

naling to the initiator to discon-

nect and retry the access at a

later time.

If a PREAD command is given to

the PCnet-PCI II controller but no

EEPROM is detected at the

Microwire interface pins, the

PREAD command will terminate

early, the PREAD bit will be

cleared to ZERO, the PVALID bit

will

remain

ZERO,

and

all

EEPROM-programmable

BCR

locations will be reset to their

H_RESET values. The contents

of the Address PROM locations,

however, will not be cleared.

Read accessible always. Write

accessible only when either the

STOP or the SPND bit is set.

PREAD is cleared to ZERO dur-

ing H_RESET and is unaffected

by S_RESET or by setting the

STOP bit.

EEDET

EEPROM Detect. This bit indi-

cates the sampled value of the

EESK/

LED1/SFBD pin at the ris-

ing edge of CLK during the last

clock during which

RST is as-

serted.

This

value

indicates

whether or not an EEPROM has

been detected at the EEPROM

interface. If this bit is a ONE, it in-

dicates that an EEPROM has

been detected. If this bit is a

ZERO,

indicates

that

EEPROM has not been detected.

Read accessible always. EEDET

is read only. Write operations

have no effect. It is unaffected by

S_RESET or by setting the

STOP bit.

The following table indicates the

possible combinations of EEDET

and

the

existence

EEPROM and the resulting op-

erations that are possible on the

EEPROM Microwire interface:

AM79C970A датащи(PDF) 155 Page - Advanced Micro Devices

AM79C970A датащи(HTML) 155 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL