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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC10LF322T-EMCSQTP датащи(PDF) 61 Page - Microchip Technology |
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PIC10LF322T-EMCSQTP датащи(HTML) 61 Page - Microchip Technology |
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61 / 210 page  2011 Microchip Technology Inc. Preliminary DS41585A-page 61 PIC10(L)F320/322 9.2.3 ERASING FLASH PROGRAM MEMORY While executing code, program memory can only be erased by rows. To erase a row: 1. Load the PMADRH:PMADRL register pair with any address within the row to be erased. 2. Clear the CFGS bit of the PMCON1 register. 3. Set the FREE and WREN bits of the PMCON1 register. 4. Write 55h, then AAh, to PMCON2 (Flash programming unlock sequence). 5. Set control bit WR of the PMCON1 register to begin the erase operation. See Example 9-2. After the “BSF PMCON1,WR” instruction, the processor requires two cycles to set up the erase operation. The user must place two NOP instructions after the WR bit is set. The processor will halt internal operations for the typical 2 ms erase time. This is not Sleep mode as the clocks and peripherals will continue to run. After the erase cycle, the processor will resume operation with the third instruction after the PMCON1 write instruction. FIGURE 9-4: FLASH PROGRAM MEMORY ERASE FLOWCHART Disable Interrupts (GIE = 0) Start Erase Operation Select Program or Configuration Memory (CFGS) Select Row Address (PMADRH:PMADRL) Select Erase Operation (FREE = 1) Enable Write/Erase Operation (WREN = 1) Unlock Sequence (FIGURE x-x) Disable Write/Erase Operation (WREN = 0) Re-enable Interrupts (GIE = 1) End Erase Operation CPU stalls while ERASE operation completes (2ms typical) Figure 9-3 |
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