PIC10LF322T-EMCSQTP datasheet(45/210 Pages) MICROCHIP

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 2011 Microchip Technology Inc.

Preliminary

DS41585A-page 45

PIC10(L)F320/322

6.3

Interrupts During Sleep

Some interrupts can be used to wake from Sleep. To

wake from Sleep, the peripheral must be able to

operate without the system clock. The interrupt source

must have the appropriate Interrupt Enable bit(s) set

prior to entering Sleep.

On waking from Sleep, if the GIE bit is also set, the

processor will branch to the interrupt vector. Otherwise,

the processor will continue executing instructions after

the SLEEP instruction. The instruction directly after the

SLEEP

instruction will always be executed before

branching to the ISR. Refer to the Section 7.0 “Power-

Down Mode (Sleep)”

for more details.

6.4

INT Pin

The INT pin can be used to generate an asynchronous

edge-triggered interrupt. This interrupt is enabled by

setting the INTE bit of the INTCON register. The

INTEDG bit of the OPTION_REG register determines on

which edge the interrupt will occur. When the INTEDG

bit is set, the rising edge will cause the interrupt. When

the INTEDG bit is clear, the falling edge will cause the

interrupt. The INTF bit of the INTCON register will be set

when a valid edge appears on the INT pin. If the GIE and

INTE bits are also set, the processor will redirect

program execution to the interrupt vector.

6.5

Context Saving During Interrupts

During an interrupt, only the return PC value is saved

on the stack. Typically, users may wish to save key

registers during an interrupt (e.g., W and STATUS

registers). This must be implemented in software.

Temporary

holding

registers

W_TEMP

and

STATUS_TEMP should be placed in the last 16 bytes

of GPR (see Figure 2-2). These 16 locations are

common to all banks and do not require banking. This

makes context save and restore operations simpler.

The code shown in Example 6-1 can be used to:

• Store the W register

• Store the STATUS register

• Execute the ISR code

• Restore the Status (and Bank Select Bit register)

• Restore the W register

EXAMPLE 6-1:

SAVING STATUS AND W REGISTERS IN RAM

Note:

These devices do not require saving the

PCLATH. However, if computed GOTOs

are used in both the ISR and the main

code, the PCLATH must be saved and

restored in the ISR.

MOVWF

W_TEMP

;Copy W to TEMP register

SWAPF

STATUS,W

;Swap status to be saved into W

;Swaps are used because they do not affect the status bits

MOVWF

STATUS_TEMP

;Save status to bank zero STATUS_TEMP register

:(ISR)

;Insert user code here

SWAPF

STATUS_TEMP,W

;Swap STATUS_TEMP register into W

;(sets bank to original state)

MOVWF

STATUS

;Move W into STATUS register

SWAPF

W_TEMP,F

;Swap W_TEMP

SWAPF

W_TEMP,W

;Swap W_TEMP into W

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