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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LSM6DB0 датащи(PDF) 31 Page - STMicroelectronics |
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LSM6DB0 датащи(HTML) 31 Page - STMicroelectronics |
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31 / 66 page  DocID025603 Rev 1 31/66 LSM6DB0 Microprocessor functionality 66 8.3 Reset management The device has an integrated brownout reset (BOR) circuit and an integrated power-on reset (POR). In the LSM6DB0, the BOR threshold is 1.5 V. When VDD is below this threshold, the device is in reset. The BOR is always active in the LSM6DB0 at power-on. The POR circuit is activated when the LDO has stabilized. The startup time of the LSM6DB0 at power-on is typically 1 ms with the BOR active. 8.4 Boot mode At startup, the LSM6DB0 boots from a reserved section of the Flash memory programmed by ST during production. It is used to adjust accurately the oscillator frequencies and contains manufacturing information. Any interference with this initialization sequence can degrade the performance of the device. At the end of this sequence, the system boots from the main Flash which contains the user’s program. 8.5 Clock management Figure 15. Clock tree 1. Same clock supply for both I2C |
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