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AD-DPGIOZ датащи(PDF) 26 Page - Analog Devices |
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AD-DPGIOZ датащи(HTML) 26 Page - Analog Devices |
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26 / 61 page ![]() AD9961/AD9963 Data Sheet Rev. A | Page 26 of 60 Register Name Register Address Bit(s) Parameter Function 11: RXCLK is driven by the DLL output. Note that the RXCLK signal is present on the TRXCLK pin with one exception. In Half-Duplex 1-Clock mode, the RXCLK signal is present on the TRXCLK pin when Rx is active, but the TXCLK signal appears on the TRXCLK pin when TX is active. 3 RXCLK_INV 0: uses TRxCLK negative edge to drive out Rxdata. 1: uses TRxCLK positive edge to drive out Rxdata. 2 RXIQ_HILO Data appears on the RXD bus sequentially but is sampled in the Rx path in pairs. RXIQ_HILO selects how the RXIQ signal marks each data pair. 0: each data pair is marked by RXIQ being low then high. 1: each data pair is marked by RXIQ being high then low. 1 RX_IFIRST The Rx path I and Q ADCs sample simultaneously producing a pair of samples. Because the RXD bus is shared, the sampled I and Q data appears on the TRXD bus sequentially. This bit determines the order of the paired samples. 0: Q appears first on Rx path. 1: I appears first on Rx path. 0 RX_BNRY 0: straight binaryon Rx path. 1: twos compliment on Rx path. FIFO Alignment 0x33 7 Unused 6 Unused 5 Unused 4 Unused 3 ALIGN_REQ 1: request FIFO read and write pointers alignment 2:0 FIFO_OFFSET[2:0] Sets the FIFO read and write pointer phase offset following FIFO reset. Normally this should be set to 000 to set the FIFO to half full. FIFO Status 0x34 7:0 FIFO_LVL[7:0] For valid transmit data path operation, the FIFO should be running half full, that is, it should always contain 4 valid DAC input samples for each DAC. FIFO_LVL values of 00011110, 00011111, 000001110, and 00001111 all indicate that the FIFO is half full. This phenomenon is due to ambiguities in reading back the FIFO_LVL level from this register using the SPI port versus the actual FIFO pointer values. Tx Scale P 0x35 7:5 Unused 4:0 SRRC_SCALE[4:0] Value of 1.4 multiplier applied to both I and Q channels just after the SRRC filter. 00000: multiply by 0.0. 00001: multiply by 0.0625. … 11111: multiply by 1.9375. Tx Scale 0 0x36 7:5 Unused 4:0 INT0_SCALE[4:0] Value of 1.4 multiplier applied to both I and Q channels just after Interpolation Filter 0. 00000: multiply by 0.0. 00001: multiply by 0.0625. … Tx Scale 1 0x37 7:5 Unused 11111: multiply by 1.9375. 4:0 INT1_SCALE[4:0] Value of 1.4 multiplier applied to both I and Q channels just after Interpolation Filter 1. 00000: multiply by 0.0. 00001: multiply by 0.0625. 11111: multiply by 1.9375. |
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