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SPEAR1310 датащи(PDF) 51 Page - STMicroelectronics |
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SPEAR1310 датащи(HTML) 51 Page - STMicroelectronics |
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51 / 57 page ![]() SPEAr1310 Direct memory access controller (DMAC) Doc ID 17528 Rev 4 51/57 ● Programmable maximum burst transfer size per channel ● Maximum transaction size configured to 256 for all the channels ● Maximum block size configured to 4095 for all the channels ● Bus locking – can be programmed to be over the transaction, block, or DMA transfer level ● Channel locking – can be programmed to be over the transaction, block, or DMA transfer level ● 16 Handshaking interfaces for source and destination peripherals ● Hardware and Software handshaking interfaces ● Peripheral interrupt handshaking interface ● Handshaking interface supports single or burst DMA transactions ● Polarity control for hardware handshaking interface ● Enabling and disabling of individual DMA handshaking interface ● Programmable flow control at block transfer level (source, destination or DMAC core) ● Software control of source data pre-fetch when destination is flow controller ● Combined and separate interrupt requests ● Interrupt generation on DMA transfer (multiblock) completion, block transfer completion, single and burst transaction completion and error condition ● Support of interrupt enabling and masking. |
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