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SPEAR1310 датащи(PDF) 19 Page - STMicroelectronics

номер детали SPEAR1310
подробное описание детали  Dual-core Cortex A9 embedded MPU for communications
PDF  57 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR1310 датащи(HTML) 19 Page - STMicroelectronics

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SPEAr1310
Flexible static memory controller (FSMC)
Doc ID 17528 Rev 4
19/57
10
Flexible static memory controller (FSMC)
The flexible static memory controller (FSMC) is an AHB peripheral that interfaces AHB
masters to a wide variety of memories. A wrapper is designed to contain this IP and a MUX
which selects the appropriate signals to connect to the pads depending on the type of
memory.
10.1
Main features
Support for NAND Flash (8 bit parallel data bus that can be extended up to 32 bits in
specific configurations)
ECC hardware: the NAND Flash controller contains a hardware acceleration block for
error correction code computation, for pages ranging from 256 to 8192
Independent chip select control for each memory bank
Write FIFO: 16 words deep, each word is 32 bits wide
Support for asynchronous NOR Flash (additional signals multiplexed on PL_GPIOs,
address and data on dedicated IOs); 26 bit address bus supported
Support for asynchronous static RAM (signals multiplexed on PL_GPIOs, address and
data on dedicated IOs); 26 bit address bus supported
Support for muxed NOR and SRAM
Independent read/write timings and protocol, allowing matching the widest variety of
memories and timings



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