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HT66F016 датащи(PDF) 41 Page - Holtek Semiconductor Inc |
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HT66F016 датащи(HTML) 41 Page - Holtek Semiconductor Inc |
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41 / 116 page ![]() HT66F016/HT66F017/HT68F016/HT68F017 Rev. 1.00 41 May 14, 2012 The maximum time out period is when the 2 18 division ra- tio is selected. As an example, with a 32 kHz LIRC oscil- lator as its source clock, this will give a maximum watchdog period of around 8 second for the 2 18 division ratio, and a minimum timeout of 7.8ms for the 2 8 division ration. · WDTC Register Bit 76543210 Name WE4 WE3 WE2 WE1 WE0 WS2 WS1 WS0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 01010011 Bit 7~3 WE4~WE0: WDT function software control If the WDT configuration option is ²always enable²: 10101 or 01010: Enabled Other: Reset MCU If the WDT configuration option is ²controlled by the WDT control register²: 10101: Disabled 01010: Enabled Other: Reset MCU When these bits are changed by the environmental noise or software setting to reset the microcontroller, the reset operation will be activated after 2~3 LIRC clock cycles and the WRF bit in the CTRL register will be set to 1. Bit 2~0 WS2, WS1, WS0: WDT time-out period selection 000: 2 8/f S 001: 2 10/f S 010: 2 12/f S 011: 2 14/f S 100: 2 15/f S 101: 2 16/f S 110: 2 17/f S 111: 2 18/f S · CTRL Register Bit 76543210 Name FSYSON ¾¾¾¾ LVRF LRF WRF R/W R/W ¾¾¾¾ R/W R/W R/W POR 0 ¾¾¾¾ x0 0 ²x² unknown Bit 7 FSYSON:fSYS Control in IDLE Mode 0: Disable 1: Enable Bit 6~3 Unimplemented, read as ²0² Bit 2 LVRF: LVR function reset flag 0: Not occur 1: Occurred This bit is set to 1 when a specific Low Voltage Reset situation condition occurs. This bit can only be cleared to 0 by the application program. Bit 1 LRF: LVR Control register software reset flag 0: Not occur 1: Occurred This bit is set to 1 if the LVRC register contains any non defined LVR voltage register values. This in effect acts like a software reset function. This bit can only be cleared to 0 by the application program. Bit 0 WRF: WDT Control register software reset flag 0: Not occur 1: Occurred This bit is set to 1 by the WDT Control register software reset and cleared by the application program. Note that this bit can only be cleared to 0 by the application program. |
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