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HT66F016 датащи(PDF) 65 Page - Holtek Semiconductor Inc |
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HT66F016 датащи(HTML) 65 Page - Holtek Semiconductor Inc |
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65 / 116 page ![]() HT66F016/HT66F017/HT68F016/HT68F017 Rev. 1.00 65 May 14, 2012 Bit 3 T1OC: TP1 output control bit Compare match output mode 0: initial low 1: initial high PWM mode/single pulse output mode 0: active low 1: active high This is the output control bit for the TM output pin. Its operation depends upon whether TM is being used in the Compare Match Output Mode or in the PWM Mode/ Single Pulse Output Mode. It has no effect if the TM is in the Timer/Counter Mode. In the Compare Match Output Mode it determines the logic level of the TM output pin before a compare match occurs. In the PWM Mode it determines if the PWM signal is active high or active low. Bit 2 T1POL: TP1 output polarity control 0: non-invert 1: invert This bit controls the polarity of the TP1 output pin. When the bit is set high the TM output pin will be inverted and not inverted when the bit is zero. It has no effect if the TM is in the Timer/Counter mode. Bit 1 T1DPX: TM1 PWM period/duty control 0: CCRP - period; CCRA - duty 1: CCRP - duty; CCRA - period This bit, determines which of the CCRA and CCRP registers are used for period and duty control of the PWM waveform. Bit 0 T1CCLR: select TM1 counter clear condition 0: TM1 Comparatror P match 1: TM1 Comparatror A match This bit is used to select the method which clears the counter. Remember that the Standard TM contains two comparators, Comparator A and Comparator P, either of which can be selected to clear the internal counter. With the T1CCLR bit set high, the counter will be cleared when a compare match occurs from the Comparator A. When the bit is low, the counter will be cleared when a compare match occurs from the Comparator P or with a counter overflow. A counter overflow clearing method can only be implemented if the CCRP bits are all cleared to zero. The T1CCLR bit is not used in the PWM, Single Pulse or Input Capture Mode. · TM1DL Register Bit 76543210 Name D7 D6 D5 D4 D3 D2 D1 D0 R/W RRRRRRRR POR 00000000 Bit 7~0 TM1DL: TM1 counter low byte register bit 7~bit 0 TM1 16-bit counter bit 7~bit 0 · TM1DH Register Bit 76543210 Name D15 D14 D13 D12 D11 D10 D9 D8 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 00000000 Bit 7~0 TM1DH: TM1 counter high byte register bit 7~bit 0 TM1 16-bit Counter bit 15~bit 8 |
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