HT66F016 datasheet(48/116 Pages) HOLTEK

48 / 116 page

HT66F016/HT66F017/HT68F016/HT68F017

Rev. 1.00

May 14, 2012

Pin-remapping Functions

The flexibility of the microcontroller range is greatly enhanced by the use of pins that have more than one function. Limited

numbers of pins can force serious design constraints on designers but by supplying pins with multi-functions, many of

these difficulties can be overcome. The way in which the pin function of each pin is selected is different for each function

and a priority order is established where more than one pin function is selected simultaneously. Additionally there is a

PRM register to establish certain pin functions. Generally speaking, the analog function has higher priority than the digital

function. However, if more than two analog functions are enabled and the analog signal input comes from the same exter-

nal pin, the analog input will be internally connected to all of these active analog functional modules.

Pin-remapping Registers

The limited number of supplied pins in a package can impose restrictions on the amount of functions a certain device

can contain. However by allowing the same pins to share several different functions and providing a means of function

selection, a wide range of different functions can be incorporated into even relatively small package sizes.

· PRM Register

Bit

76543210

Name

PRML3

PRML2

PRML1

PRML0

PRMS3

PRMS2

PRMS1

PRMS0

R/W

POR

01010000

Bit 7~4

PRML3~PRML0: pin-remapping function lock bits (default: 0101)

1010: PRM register write operation is enabled

Others: PRM register write operation is disabled

Bit 3

PRMS3: INT1 pin-remapping function selection bit

0: INT1 on PA5

1: INT1 on PA4

Bit 2

PRMS2: INT0/TCK1 pin-remapping function selection bit

0: INT0 on PA3, TCK1 on PA3

1: INT0 on PA2, TCK1 on PA2

Bit 1~0

PRMS1~PRMS0: pin-remapping function selection bits

For HT66F017, HT68F017

0: TP0 on PA3, TP1/TCK0 on PA4

1: TP0 on PB0, TP1/TCK0 on PB1

2: TP0 on PA5, TP1/TCK0 on PA6

3: TP0 on PA2, TP1/TCK0 on PA7

For HT66F016, HT68F016

0: TP1 on PA4

1: TP1 on PB1

2: TP1 on PA6

3: TP1 on PA7

I/O Pin Structures

The accompanying diagrams illustrate the internal

structures of some generic I/O pin types. As the exact

logical construction of the I/O pin will differ from these

drawings, they are supplied as a guide only to assist

with the functional understanding of the I/O pins. The

wide range of pin-shared structures does not permit all

types to be shown.

Programming Considerations

Within the user program, one of the first things to con-

sider is port initialisation. After a reset, all of the I/O data

and port control registers will be set high. This means

that all I/O pins will default to an input state, the level of

which depends on the other connected circuitry and

whether pull-high selections have been chosen. If the

port control registers, PAC and PBC, are then pro-

grammed to setup some pins as outputs, these output

pins will have an initial high output value unless the as-

sociated port data registers, PA and PB, are first pro-

grammed. Selecting which pins are inputs and which

are outputs can be achieved byte-wide by loading the

correct values into the appropriate port control register

or by programming individual bits in the port control reg-

ister using the

²SET [m].i² and ²CLR [m].i² instructions.

Note that when using these bit control instructions, a

read-modify-write operation takes place. The

microcontroller must first read in the data on the entire

port, modify it to the required new bit values and then re-

write this data back to the output ports.

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