HT66F016 datasheet(92/116 Pages) HOLTEK

92 / 116 page

HT66F016/HT66F017/HT68F016/HT68F017

Rev. 1.00

May 14, 2012

EEPROM Interrupt

The EEPROM Interrupt, is contained within the

Multi-function Interrupt. An EEPROM Interrupt request

will take place when the EEPROM Interrupt request

flag, DEF, is set, which occurs when an EEPROM Write

cycle ends. To allow the program to branch to its respec-

tive interrupt vector address, the global interrupt enable

bit, EMI, EEPROM Interrupt enable bit, DEE, and asso-

ciated Multi-function interrupt enable bit, must first be

set. When the interrupt is enabled, the stack is not full

and an EEPROM Write cycle ends, a subroutine call to

the respective Multi-function Interrupt vector, will take

place. When the EEPROM Interrupt is serviced, the EMI

bit will be automatically cleared to disable other inter-

rupts, however only the Multi-function interrupt request

flag will be also automatically cleared. As the DEF flag

will not be automatically cleared, it has to be cleared by

the application program.

LVD Interrupt

The Low Voltage Detector Interrupt is contained within

the Multi-function Interrupt. An LVD Interrupt request will

take place when the LVD Interrupt request flag, LVF, is

set, which occurs when the Low Voltage Detector func-

tion detects a low power supply voltage. To allow the

program to branch to its respective interrupt vector ad-

dress, the global interrupt enable bit, EMI, Low Voltage

Interrupt enable bit, LVE, and associated Multi-function

interrupt enable bit, must first be set. When the interrupt

is enabled, the stack is not full and a low voltage condi-

tion occurs, a subroutine call to the Multi-function Inter-

rupt vector, will take place. When the Low Voltage

Interrupt is serviced, the EMI bit will be automatically

cleared to disable other interrupts, however only the

Multi-function interrupt request flag will be also automat-

ically cleared. As the LVF flag will not be automatically

cleared, it has to be cleared by the application program.

TM Interrupts

The Compact and Standard Type TMs have two inter-

rupts each. All of the TM interrupts are contained within

the Multi-function Interrupts. For each of the Compact

and Standard Type TMs there are two interrupt request

flags TnPF and TnAF and two enable bits TnPE and

TnAE. A TM interrupt request will take place when any

of the TM request flags are set, a situation which occurs

when a TM comparator P or A match situation happens.

To allow the program to branch to its respective interrupt

vector address, the global interrupt enable bit, EMI, re-

spective TM Interrupt enable bit, and relevant

Multi-function Interrupt enable bit, MFnE, must first be

set. When the interrupt is enabled, the stack is not full

and a TM comparator match situation occurs, a subrou-

tine call to the relevant Multi-function Interrupt vector lo-

cations, will take place. When the TM interrupt is

serviced, the EMI bit will be automatically cleared to dis-

able other interrupts, however only the related MFnF

flag will be automatically cleared. As the TM interrupt re-

quest flags will not be automatically cleared, they have

to be cleared by the application program.

Interrupt Wake-up Function

Each of the interrupt functions has the capability of wak-

ing up the microcontroller when in the SLEEP or IDLE

Mode. A wake-up is generated when an interrupt re-

quest flag changes from low to high and is independent

of whether the interrupt is enabled or not. Therefore,

even though the device is in the SLEEP or IDLE Mode

and its system oscillator stopped, situations such as ex-

ternal edge transitions on the external interrupt pins, a

low power supply voltage or comparator input change

may cause their respective interrupt flag to be set high

and consequently generate an interrupt. Care must

therefore be taken if spurious wake-up situations are to

be avoided. If an interrupt wake-up function is to be dis-

abled then the corresponding interrupt request flag

should be set high before the device enters the SLEEP

or IDLE Mode. The interrupt enable bits have no effect

on the interrupt wake-up function.

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