DM9302 datasheet(5/64 Pages) DAVICOM

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DM9302

10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus

Preliminary datasheet

DM9302-15-DS-P01

July 30, 2009

6.46 Memory Data Pre-Fetch Read Command without Address Increment Register (F0H) ........................ 32

6.47 Memory Data Read Command with Address Increment Register (F2H)................................................ 32

6.48 Memory Data Read Address Register (F4H) ............................................................................................. 32

6.49 Memory Data Read Address Register (F5H) ............................................................................................. 32

6.50 Memory Data Write Command without Address Increment Register (F6H).......................................... 32

6.51 Memory Data Write Command with Address Increment Register (F8H) ............................................... 33

6.52 Memory Data Write Address Register (FAH) ............................................................................................ 33

6.53 Memory Data Write Address Register (FBH) ............................................................................................ 33

6.54 TX Packet Length Registers (FCH~FDH) .................................................................................................. 33

6.55 Interrupt Status Register (FEH).................................................................................................................. 33

6.56 Interrupt Mask Register (FFH) .................................................................................................................... 33

EEPROM FORMAT........................................................................................................ 34

PHY REGISTERS .......................................................................................................... 37

8.1 Basic Mode Control Register (BMCR) – 00H .............................................................................................. 38

8.2 Basic Mode Status Register (BMSR) – 01H ................................................................................................ 39

8.3 PHY ID Identifier Register #1 (PHYID1) – 02H............................................................................................. 40

8.4 PHY ID Identifier Register #2 (PHYID2) – 03H............................................................................................. 40

8.5 Auto-negotiation Advertisement Register (ANAR) – 04H.......................................................................... 40

8.6 Auto-negotiation Link Partner Ability Register (ANLPAR) – 05H ............................................................. 41

8.7 Auto-negotiation Expansion Register (ANER) - 06H ................................................................................. 42

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