DM9302 datasheet(44/64 Pages) DAVICOM

44 / 64 page

DM9302

10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus

Preliminary datasheet

DM9302-15-DS-P01

July 30, 2009

RLOUT

0, RW

Remote Loop out Control

When this bit is set to 1, the received data will loop out to the

transmit channel. This is useful for bit error rate testing

8.9 DAVICOM Specified Configuration and Status Register (DSCSR) – 11H

Bit

Bit Name

Default

Description

100FDX

1, RO 100M Full Duplex Operation Mode

After auto-negotiation is completed, results will be written to this bit. If this bit is 1, it

means the operation 1 mode is a 100M full duplex mode. The software can read bit

[15:12] to see which mode is selected after auto-negotiation. This bit is invalid when

it is not in the auto-negotiation mode

100HDX

1, RO 100M Half Duplex Operation Mode

After auto-negotiation is completed, results will be written to this bit. If this bit is 1, it

means the operation 1 mode is a 100M half duplex mode. The software can read bit

[15:12] to see which mode is selected after auto-negotiation. This bit is invalid when

it is not in the auto-negotiation mode

10FDX

1, RO 10M Full Duplex Operation Mode

After auto-negotiation is completed, results will be written to this bit. If this bit is 1, it

means the operation 1 mode is a 10M Full Duplex mode. The software can read bit

[15:12] to see which mode is selected after auto-negotiation. This bit is invalid when

it is not in the auto-negotiation mode

10HDX

1, RO 10M Half Duplex Operation Mode

After auto-negotiation is completed, results will be written to this bit. If this bit is 1, it

means the operation 1 mode is a 10M half duplex mode. The software can read bit

[15:12] to see which mode is selected after auto-negotiation. This bit is invalid when

it is not in the auto-negotiation mode

Reserved

0, RO Reserved

Read as 0, ignore on write

Reserved

0,RW Reserved

Reserved

0,RW Reserved

8-4 PHYADR[4:0] 1, RW PHY Address Bit 4:0

The first PHY address bit transmitted or received is the MSB of the address (bit 4). A

station management entity connected to multiple PHY entities must know the

appropriate address of each PHY

Auto-negotiation Monitor Bits

These bits are for debug only. The auto-negotiation status will be written to these

bits.

B3 B2 B1 B0

0 0 0 0

In IDLE state

0 0 0 1

Ability match

0 0 1 0

Acknowledge match

0 0 1 1

Acknowledge match fail

0 1 0 0

Consistency match

0 1 0 1

Consistency match fail

0 1 1 0

Parallel detects signal link ready

0 1 1 1

Parallel detects signal link ready fail

3-0 ANMB[3:0]

0, RO

1 0 0 0

Auto-negotiation completed successfully

DM9302 датащи(PDF) 44 Page - Davicom Semiconductor, Inc.

DM9302 датащи(HTML) 44 Page - Davicom Semiconductor, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

датащи скачать

ссылки URL