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Document Number: 94542

4

Revision: 12-May-10

FC40SA50FKP

Vishay Semiconductors

Power MOSFET, 40 A

Fig. 5 - Typical Capacitance vs.

Drain to Source Voltage

Fig. 6 - Typical Gate Charge vs.

Gate to Source Voltage

Fig. 7 - Typical Source Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

Fig. 9 - Maximum Drain Current vs.

Case Temperature

Fig. 10a - Switching Time Test Circuit

1

10

100

1000

VDS, Drain-to-Source Voltage (V)

10

100

1000

10000

100000

Coss

Crss

Ciss

VGS = 0V,

f = 1 MHZ

C

iss

= C

gs

+ C

gd

, C

ds

SHORTED

C

rss

= C

gd

C

oss

= C

ds

+ C

gd

0

5

10

15

20

0100

200

300

0.1

1

10

100

1000

0.20.7

1.21.7

1

10

100

1000

10

100

1000

V

100us

10ms

1ms

OPERATION IN THIS AREA

LIMITED BY RDS(on)

T

T

Single Pulse

0

10

20

30

40

25

50

75

100

125

150

TC, Case Temperature (°C)

Pulse width

≤ 1 µs

Duty factor

≤ 0.1 %

D.U.T.

10 V

+

-

V

DS

R

D

V

DD

R

G

V

GS