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PCF2123TS датащи(PDF) 52 Page - NXP Semiconductors |
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PCF2123TS датащи(HTML) 52 Page - NXP Semiconductors |
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52 / 63 page ![]() PCF2123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 5 — 27 April 2011 52 of 63 NXP Semiconductors PCF2123 SPI Real time clock/calendar 17. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling Metal-Oxide Semiconductor (MOS) devices ensure that all normal precautions are taken as described in JESD625-A, IEC 61340-5 or equivalent standards. 18. Packing information [1] Wafer mapping information will be distributed to customer’s ftp server. (1) Die marking code. Seal ring plus gap to active circuit ~18 μm. Fig 36. PCF2123Ux wafer information 013aaa232 Saw lane ~18 μm 45 μm 70 μm ~18 μm detail X 1.449 mm 1.492 mm 1 1 1 1 X straight edge of the wafer (1) Table 50. PCF2123Ux wafer information Type number Wafer thickness ( μm) Wafer diameter Marking of bad die PCF2123U/5GA/1 687 6 inch wafer mapping[1] PCF2123U/10AA/1 200 6 inch inking PCF2123U/12AA/1 200 6 inch wafer mapping[1] PCF2123U/12HA/1 150 6 inch inking |
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