PCF2123TS datasheet(41/63 Pages) NXP

41 / 63 page

PCF2123

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Product data sheet

Rev. 5 — 27 April 2011

41 of 63

NXP Semiconductors

PCF2123

SPI Real time clock/calendar

[1]

For reliable oscillator start at power-on: VDD =VDD(min) +0.3 V.

[2]

Timer source clock = 1

⁄

60 Hz, level of pins CE, SDI, and SCL is VDD or VSS.

[3]

In case of an ESD event, the value may increase slightly.

[4]

Implicit by design.

[5]

Refers to external pull-up voltage.

[6]

Integrated load capacitance, CL(itg), is a calculation of COSCI and COSCO in series:

Inputs

VIL

LOW-level input voltage

0.3VDD

VIH

HIGH-level input voltage

0.7VDD

--V

input voltage

on pins CE, SDI, SCL, OSCI,

CLKOE, CLKOUT

−0.5

+5.5

ILI

input leakage current

VI =VDD or VSS on pins SDI,

SCL, OSCI, CLKOE, CLKOUT

[3] -0

μA

VI =VSS on pin CE

−10

μA

Rpd

pull-down resistance

on pin CE

240

550

input capacitance

on pins SDI, SCL, CLKOE and

[4] --7

Outputs

output voltage

on pins CLKOUT and INT

[5]

−0.5

+5.5

on pin OSCO

−0.5

+5.5

on pin SDO

−0.5

VDD +0.5

VOH

HIGH-level output voltage

on pin SDO

0.8VDD

-VDD

VOL

LOW-level output voltage

on pin SDO

VSS

-0.2VDD

on pins CLKOUT and INT;

VDD =5V;

IOL =1.5 mA

VSS

-0.4

IOH

HIGH-level output current

output source current;

VOH =4.6 V;

VDD = 5 V on pin SDO

1.5

--mA

IOL

LOW-level output current

output sink current;

VOL =0.4 V;

VDD = 5 V on pins INT, SDO

and CLKOUT

1.5

--mA

ILO

output leakage current

VO =VDD or VSS

[3] -0

μA

CL(itg)

integrated load

capacitance

on pins OSCO and OSCI

[6] 3.3

series resistance

100

Table 44.

Static characteristics …continued

VDD = 1.1 V to 5.5 V; VSS =0V; Tamb = −40 °C to +85 °C; fosc = 32.768 kHz; quartz Rs =15kΩ; CL = 7 pF; unless otherwise

specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Litg

()

OSCI

OSCO

⋅

()

OSCI

OSCO

()

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