ST10F276Z5 datasheet(114/239 Pages) STMICROELECTRONICS

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System reset

ST10F276Z5

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always with FFFFh, which leads to an illegal opcode and consequently a trap event is

generated.

Exit from synchronous reset state

The reset sequence is extended until RSTIN level becomes high. Besides, it is internally

prolonged by the FLASH initialization when EA=1 (internal memory selected). Then, the

code execution restarts. The system configuration is latched from Port0, and ALE, RD and

WR/WRL pins are driven to their inactive level. The device starts program execution from

memory location 00'0000h in code segment 0. This starting location will typically point to the

general initialization routine. Timing of synchronous reset sequence are summarized in

Figures 28 and 29 where a Short Reset event is shown, with particular highlighting on the

fact that it can degenerate into Long Reset: the two figures show the behavior when booting

from internal or external memory respectively. Figure 30 and Figure 31 reports the timing of

a typical synchronous Long Reset, again when booting from internal or external memory.

Synchronous reset and RPD pin

Whenever the RSTIN pin is pulled low (by external hardware or as a consequence of a

Bidirectional reset), the RPD internal weak pull-down is activated. The external capacitance

(if any) on RPD pin is slowly discharged through the internal weak pull-down. If the voltage

level on RPD pin reaches the input low threshold (around 2.5 V), the reset event becomes

immediately asynchronous. In case of hardware reset (short or long) the situation goes

immediately to the one illustrated in Figure 26. There is no effect if RPD comes again above

the input threshold: the asynchronous reset is completed coherently. To grant the normal

completion of a synchronous reset, the value of the capacitance shall be big enough to

maintain the voltage on RPD pin sufficient high along the duration of the internal reset

sequence.

For a Software or Watchdog reset events, an active synchronous reset is completed

regardless of the RPD status.

It is important to highlight that the signal that makes RPD status transparent under reset is

the internal RSTF (after the noise filter).

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