IXP45X datasheet(126/148 Pages) INTEL

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Intel® IXP45X and Intel® IXP46X Product Line of Network Processors—Datasheet

Intel® IXP45X and Intel® IXP46X Product Line of Network Processors

Datasheet

August 2006

126

Document Number: 306261-004US

5.6.2.7.2

Expansion Bus Asynchronous Operation

Table 65.

Expansion Bus Synchronous Operation Timing Values

Symbol

Parameter

Low Drive

Med Drive

Hi Drive

Units Notes

Min.

Max.

Min.

Max.

Min.

Max.

Valid rising edge of EX_CLK to valid signal on the

output.

8.5

6.5

1, 2, 3,

Valid signal hold time after the rising edge of EX_CLK

1, 2, 3,

Valid data signal on an input prior to the rising edge of

EX_CLK

1, 2, 3,

Required hold time of a data input after the rising edge

of EX_CLK

0.5

1, 2, 3,

Valid control/arbiter signal on an input prior to the

rising edge of EX_CLK

3.5

1, 2, 3,

Required hold time of a control/arbiter input after the

rising edge of EX_CLK

0.5

1, 2, 3,

Notes:

Timing was designed for a system load between 5pF and 60pF for low drive setting at typically no more than a 33MHz

clock

Timing was designed for a system load between 5pF and 50pF for medium drive setting at typically no more than a

66MHz clock

Timing was designed for a system load between 5pF and 40pF for high drive setting at typically no more than a 80MHz

clock

Drive settings do not apply to EX_CS_N signals and are expected to be point to point. The timing on this signal was

designed for a system load between 5pF and 10pF

EX_control_signals output signals consist of EX_ALE, EX_ADDR, EX_CS_N, EX_GNT_REQ_N, EX_GNT_N, EX_RD_N,

EX_WR_N, EX_WAIT_N

EX_control_signals input signals consist of EX_ADDR, EX_CS_N, EX_SLAVE_CS_N, EX_REQ_GNT_N, EX_REQ_N,

EX_BURST, EX_RD_N, EX_WR_N

Figure 33.

Intel Multiplexed Mode

A9585-01

EX_CLK

EX_ADDR

EX_DATA

EX_RD_N

EX_DATA

EX_ALE

EX_WR_N

EX_CS_N

Valid Address

1-16 Cycles

1-4 Cycles

Trecov

Tale2addrhold

Trdsetup

Trdhold

Tdval2valwrt

Tdhold2afterwr

1-16 Cycles

1-4 Cycles

2-5 Cycles

ALE Extended

Talepulse Tale2valcs

Twrpulse

Address

Output Data

Address

Input Data

Multiplexed Address/Data

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