IXP45X datasheet(130/148 Pages) INTEL

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Intel® IXP45X and Intel® IXP46X Product Line of Network Processors—Datasheet

Intel® IXP45X and Intel® IXP46X Product Line of Network Processors

Datasheet

August 2006

130

Document Number: 306261-004US

Tale2valcs

Valid chip select after the falling edge of ALE

Cycles

Trdsetup

Data valid required before the rising edge of

EXP_MOT_DS_N

14.7

Trdhold

Data hold required after the rising edge of EXP_MOT_DS_N

Trecov

Time needed between successive accesses on expansion

interface.

116

Cycles

Figure 36.

Motorola* Simplex Mode

Table 68.

Motorola* Multiplexed Mode Values (Sheet 2 of 2)

Symbol

Parameter

Min.

Max. Units

Notes

Notes:

The EX_ALE signal is extended form T to 4T nnsec, based on the programming of the T1 timing

parameter. The parameter Tale2addrhold is fixed at T.

Setting the address phase parameter (T1) will adjust the duration that the address appears to the

external device.

Setting the data setup phase parameter (T2) will adjust the duration that the data appears prior to a

data strobe (read or write) to an external device.

Setting the data strobe phase parameter (T3) will adjust the duration that the data strobe appears

(read or write) to an external device. Data will be available during this time as well.

Setting the data hold strobe phase parameter (T4) will adjust the duration that the chip selects,

address, and data (during a write) will be held.

Setting the recovery phase parameter (T5) will adjust the duration between successive accesses on

the expansion interface.

T is the period of the clock measured in ns.

Clock to output delay for all signals will be a maximum of 15 ns for devices requiring operation in

synchronous mode.

Timing was designed for a system load between 5pF and 60pF for high drive setting

A9588-01

EX_CLK

EX_ADDR

EX_DATA

EX_WR_N

(exp_mot_ds_n)

EX_RD_N

(exp_mot_rnw)

EX_DATA

EX_RD_N

(exp_mot_rnw)

Valid Address

Output Data

1-16 Cycles

1-4 Cycles

EX_CS_N

Tdspulse

Trecov

Tad2valcs

Tdval2valds

Input Data

Tdhold2afterds

1-16 Cycles

1-4 Cycles

EX_WR_N

(exp_mot_ds_n)

Trdsetup

Trdhold

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