5000 datasheet(25/104 Pages) INTEL

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Dual-Core Intel® Xeon® Processor 5000 Series Datasheet

Electrical Specifications

Notes:

For functional operation, all processor electrical, signal quality, mechanical and thermal specifications must

be satisfied.

Overshoot and undershoot voltage guidelines for input, output, and I/O signals are outlined in Section 3.

Excessive overshoot or undershoot on any signal will likely result in permanent damage to the processor.

Storage temperature is applicable to storage conditions only. In this scenario, the processor must not

receive a clock, and no lands can be connected to a voltage bias. Storage within these limits will not affect

the long-term reliability of the device. For functional operation, please refer to the processor case

temperature specifications.

This rating applies to the processor and does not include any tray or packaging.

Failure to adhere to this specification can affect the long term reliability of the processor.

2.12

Processor DC Specifications

The processor DC specifications in this section are defined at the processor

core (pads) unless noted otherwise. See Section 4.1 for the Dual-Core Intel Xeon

Processor 5000 series land listings and Section 5.1 for signal definitions. Voltage and

current specifications are detailed in Table 2-10. For platform planning refer to

Table 2-11, which provides Voltage-Current projections. This same information is

presented graphically in Figure 2-4.

BSEL[2:0] and VID[5:0] signals are specified in Table 2-12. The DC specifications for

the AGTL+ signals are listed in Table 2-13. Legacy signals and Test Access Port (TAP)

signals follow DC specifications similar to GTL+. The DC specifications for the

PWRGOOD input and TAP signal group are listed in Table 2-14 and the Asynchronous

GTL+ signal group is listed in Table 2-15. The VTTPWRGD signal is detailed in

Table 2-16.

Table 2-10 through Table 2-16 list the DC specifications for the processor and are valid

only while meeting specifications for case temperature (TCASE as specified in Table 6-1),

clock frequency, and input voltages. Care should be taken to read all notes

associated with each parameter.

Table 2-10. Voltage and Current Specifications (Sheet 1 of 2)

Symbol

Parameter

Min

Typ

Max

Unit

Notes

1,13

VID

VID range

1.0750

1.3500

VCC

VCC for Dual-Core Intel Xeon

Processor 5000 series core. FMB

processor.

See Table 2-11 and Figure 2-4

2, 3, 4, 6,

VVID_STEP

VID step size during a transition

± 12.5

VVID_SHIFT

Total allowable DC load line shift

from VID steps

425

VTT

FSB termination voltage (DC + AC

specification)

1.140

1.20

1.260

10, 14

ICC

ICC for Dual-Core Intel Xeon

Processor 5000 series with multiple

VID (667 MHz)

115

4, 5, 6, 11

ICC

ICC for Dual-Core Intel Xeon

Processor 5000 series with multiple

VID (1066 MHz)

150

4, 5, 6, 11

ICC

ICC for Dual-Core Intel Xeon

Processor 5063 (MV) with multiple

VID

115

4, 5, 6, 11

ICC_RESET

ICC_RESET for Dual-Core Intel Xeon

Processor 5000 series with multiple

VID (667 MHz)

115

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