LPC1102

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Objective data sheet

Rev. 00 — 23 June 2010

21 of 38

NXP Semiconductors

LPC1102

32-bit ARM Cortex-M0 microcontroller

9.1 BOD static characteristics

[1]

Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see LPC111x

user manual.

9.2 Power consumption

Power measurements in Active, Sleep, and Deep-sleep modes were performed under the

following conditions (see LPC111x user manual):

Table 7.

BOD static characteristics[1]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

threshold voltage

interrupt level 0

assertion

-

1.65

-

V

de-assertion

-

1.80

-

V

interrupt level 1

assertion

-

2.22

-

V

de-assertion

-

2.35

-

V

interrupt level 2

assertion

-

2.52

-

V

de-assertion

-

2.66

-

V

interrupt level 3

assertion

-

2.80

-

V

de-assertion

-

2.90

-

V

reset level 0

assertion

-

1.46

-

V

de-assertion

-

1.63

-

V

reset level 1

assertion

-

2.06

-

V

de-assertion

-

2.15

-

V

reset level 2

assertion

-

2.35

-

V

de-assertion

-

2.43

-

V

reset level 3

assertion

-

2.63

-

V

de-assertion

-

2.71

-

V