поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

KM416RD8ACD-RK80 датащи(PDF) 36 Page - Samsung semiconductor

номер детали KM416RD8ACD-RK80
подробное описание детали  128/144Mbit RDRAM 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM
PDF  64 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  SAMSUNG [Samsung semiconductor]
домашняя страница  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KM416RD8ACD-RK80 датащи(HTML) 36 Page - Samsung semiconductor

Back Button KM416RD8ACD-RK80 Datasheet HTML 32Page - Samsung semiconductor KM416RD8ACD-RK80 Datasheet HTML 33Page - Samsung semiconductor KM416RD8ACD-RK80 Datasheet HTML 34Page - Samsung semiconductor KM416RD8ACD-RK80 Datasheet HTML 35Page - Samsung semiconductor KM416RD8ACD-RK80 Datasheet HTML 36Page - Samsung semiconductor KM416RD8ACD-RK80 Datasheet HTML 37Page - Samsung semiconductor KM416RD8ACD-RK80 Datasheet HTML 38Page - Samsung semiconductor KM416RD8ACD-RK80 Datasheet HTML 39Page - Samsung semiconductor KM416RD8ACD-RK80 Datasheet HTML 40Page - Samsung semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 36 / 64 page
background image
Page 33
KM416RD8AC(D)/KM418RD8AC(D)
Direct RDRAM™
Rev. 1.01 Oct. 1999
. .
Figure 29: CNFGB Register
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
DEVTYP2..0
= 000
BYT
B
SVER5..0
= 00000
CORG4..0
= 00100
SPT
1
Control Register: CNFGB
Address: 02416
Read-only register.
BYT - Byte width. B=1 means the device reads and
writes 9-bit memory bytes. B=0 means 8 bits.
DEVTYP2..0 - Device type. DEVTYP = 000 means
that this device is an RDRAM.
SPT - Split-core. SPT=1 means the core is split, SPT=0 means it is not.
CORG4..0 - Core organization. This field specifies the number of bank
(5 bits), row (9 bits), and column (6 bits) address bits.
SVER5..0 - Stepping version. Specifies the mask version number of this
device.
Figure 30: TEST Register
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Read/write register.
Reset value of TEST34 is zero (from SIO Reset)
This register are used for testing purposes. It must not
be read or written after SIO Reset.
Control Register: TEST34
Address: 02216
0
0
Figure 31: DEVID Register
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
DEVID4..DEVID0
0
0
0
0
0
0
0
0
0
0
Read/write register.
Reset value is undefined.
Device Identification register.
DEVID4..DEVID0 is compared to DR4..DR0,
DC4..DC0, and DX4..DX0 fields for all memory read
or write transactions. This determines which RDRAM
is selected for the memory read or write transaction.
Control Register: DEVID
Address: 04016



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com