HT82K75REW datasheet(33/103 Pages) HOLTEK

33 / 103 page

HT82M75REW/HT82K75REW

Rev. 1.00

June 11, 2010

DC-to-DC Converter (DC/DC) Section

This circuit is used to generate a stable 2.8V or 3.0V or

3.3V (error

±5%) power voltage for whole IC and output

to the IRPT. The clock of DC/DC is 140kHz. Also it can

detect the battery voltage. If the battery voltage drops to

2.2V or 2.0V determined by a configuration option (er -

ror

±5%), the DC/DC circuit will output a Low Voltage De-

tect signal LVD (2.2V/2.0V Low battery flag stored in as-

sociated flag bit of the Control Register CTLR.2) to

MCU. Also there is a low voltage reset (LVR) circuit to

check the DC/DC output voltage. When the DC/DC out-

put voltage drops to 2.4V, the MCU will be reset. The

LVR function is controlled by a configuration together

with a software control bit named DC_ctrl in the Control

ration option of LVR function has to be enabled and the

control bit DC_ctrl must be set to 0 to enable the DC/DC

circuit. If the configuration option is selected to disable

the LVR function or the DC_ctrl bit is set to 1 to disable

the DC/DC circuit, then the LVR function will be dis-

abled. If the LVR function is enabled by appropriate set-

ting of the configuration option and software control bit

as mentioned above, then the LVR still works even if the

MCU enters into the Power Down Mode. It is recom-

mended that the LVR function is enabled when the MCU

is in the Power Down Mode.

When the DC/DC output voltage drops to 2.2V, the

DC/DC can still work properly and is capable of output-

ting driving current with 100mA typically.

As the voltage of the Battery-in pin drops to 1.8V, the

DC/DC still has the capability of outputting current with

40mA at least.

The DC/DC output signal 1.8V/2.0V/2.2V/2.5V/2.8V

LVD is connected to the associated flag in Control Reg-

ister (i.e. bit 2 in CTLR).

Test_DC is the internal test pin of the DC_DC.

D C / D C w i t h

V o l t a g e D e t e c t o r

B A T _ I N

D C _ O u t

T e s t _ D C

L X

2 . 4 L V R

1 . 8 V / 2 . 0 V / 2 . 2 V / 2 . 5 V / 2 . 8 V L V D

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