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HT82K75REW датащи(PDF) 46 Page - Holtek Semiconductor Inc

номер детали HT82K75REW
подробное описание детали  2.4GHz Transceiver 8-Bit OTP MCU
PDF  103 Pages
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производитель  HOLTEK [Holtek Semiconductor Inc]
домашняя страница  http://www.holtek.com
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HT82M75REW/HT82K75REW
Rev. 1.00
46
June 11, 2010
RF Transceiver Power-on and Reset Characteristics
The RF Transceiver has built-in power-on reset (POR)
circuit which automatically resets all digital registers
when the power is turned on. The 32MHz oscillator cir-
cuit starts to lock frequency of the right clock after
power-on. The whole process takes 3ms for a clock cir-
cuit to become stable and completes the power-on re-
set. It is highly recommended that the user waits at least
3ms before starting to access the RF Transceiver.
The RF Transceiver hardware reset signal (warm start)
named RST is controlled by MCU I/O pin and internally
pulled high with 33k
W resistor connected to VCC within
the RF Transceiver. The RF Transceiver will hold in re-
set state around 20
ms after RST signal is released from
the low state.
RF Transceiver Crystal Parameter Specifications
The RF Transceiver utilizes external 32MHz crystal to
generate the oscillation for RF Transceiver input clock.
The associated pins are XTAL_P and XTAL_N. The ta-
ble below lists the parameters of the crystal oscillator
used in the RF Transceiver. To operate the RF Trans-
ceiver properly, user has to select the crystal which
meets the following requirements.
Parameters
Min.
Typ.
Max.
Unit
Crystal Frequency
32
¾
MHz
Frequency Offset
-40
¾
40
ppm
Load Capacitance
¾¾
10
pF
Recovery Time
¾¾
180
ms
32 MHz crystal oscillator recovery time highly depends
on the shunt capacitance of 32 MHz crystal. The lower
shunt capacitance value makes the recovery time
shorter. This recovery time 180
ms is measured with 32
MHz crystal by NDK NX3225SA.
RF Transceiver Functional Description
The RF transceiver integrates receiver, transmitter, volt-
age-controlled oscillator (VCO), and phase-locked loop
(PLL). It uses advanced radio architecture to minimize
the external component count and the power consump-
tion. The Baseband/MAC block provides the hardware
architecture for both MAC and PHY layers. It mainly
consists of TX/RX control and digital signal processing
module. Interconnection between the MCU and the RF
Transceiver is implemented by internally connecting the
MCU Master SPI interface to the RF Transceiver Slave
SPI interface. All data transmissions and receptions be-
tween MCU and RF Transceiver including RF Trans-
ceiver commands are conducted along this
interconnected SPI interface. The RF Transceiver func-
tion control is executed by the MCU using its SPI Master
serial interface. The RF Transceiver contains its own in-
dependent interrupt which can be used to indicate when
a wake-up event occurs, an available packet reception
occurs or when a packet transmission has successfully
terminated or retransmission is timed out.
RF Transceiver Internal Connection
In addition to the RF Transceiver external pins de-
scribed above there are other MCU to RF Transceiver
interconnecting lines that are described in the above RF
Transceiver Pin Description table. Note that these lines
are internal to the device and are not bonded to external
pins.
The RF Transceiver is composed of several functional
blocks named Interfacing block, Lower MAC block,
Memory block, Power Management block and PHY
block. The detailed functions of the functional blocks are
described in the following sections.
V D D
V C C
V D D _ R F
S C L K
S I
S O
S E N
I N T
R S T
S C K
S D O
S D I
S C S
I N T
I / O
V D D
V S S
G N D
G P I O 0
G P I O 1
G P I O 2
R F _ P
R F _ N
X T A L _ P
X T A L _ N
R F
T r a n s c e i v e r
M C U
MCU to RF Transceiver Internal Connection



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