HT82K75REW datasheet(69/103 Pages) HOLTEK

69 / 103 page

HT82M75REW/HT82K75REW

Rev. 1.00

June 11, 2010

· SREG0x26 - GATECLK: Gated Clock control Register

Bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

¾¾

SPISYNC

¾¾

ENTRM

¾¾

Type

R/W

POR

00000000

Bit 7~6

Reserved: maintain as

²0b00²

Bit 5

SPISYNC: SPI Interface Synchronization

1: enable (optimized - do not change)

0: disable (default)

Bit 4~3

Reserved: maintain as

²0b00²

Bit 2

ENTRM: TX MAC Clock Enable Control

1: enable

0: disable (default)

Bit 1~0

Reserved: maintain as

²0b00²

· SREG0x2A - SOFTRST: Software Reset control Register

Bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

¾¾¾¾¾¾

RSTBB

RSTMAC

Type

RRRRRR

POR

00000000

Bit 7-2

Reserved: Maintain as

²0b000000²

Bit 1

RSTBB: Baseband Reset

1: reset baseband circuitry. Initialization is not needed after RSTBB reset. Bit is automatically

cleared to 0 by hardware.

Bit 0

RSTMAC: MAC and Short/Long Addressing Registers Reset.

1: Reset MAC circuitry and Short/Long Addressing Registers. Initialization is needed after

RSTMAC reset. Bit is automatically cleared to

²0² by hardware.

· SREG0x2E - TXPEMISP: Transmit Parameters Register

Bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

TXPET3

TXPET2

TXPET1

TXPET0

¾¾¾¾

Type

R/W

RRRR

POR

01110101

Bit 7~4

TXPET [3:0]: TXFIFO Retry Times.

0111: (default)

1001: (optimized - do not change)

Bit 3~0

Reserved: maintain as

²0b0101²

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