HT82K75REW datasheet(84/103 Pages) HOLTEK

84 / 103 page

HT82M75REW/HT82K75REW

Rev. 1.00

June 11, 2010

RF Transceiver Power-down and Wake-up

The MCU and RF Transceiver are powered down independently of each other. The method of powering down the MCU

is covered in the previous MCU section of the datasheet. The RF Transceiver must be powered down before the MCU

is powered down. The method of powering down the RF Transceiver is mentioned in the previous Power Saving Mode

section of this datasheet.

For a RF Transceiver interrupt to occur, in addition to the bits for the related enable and interrupt polarity control de-

scribed in RF Transceiver Interrupt Configuration section being set, the global interrupt enable control and the related

interrupt enable control bits in host MCU must also be set. If the bits related to the interrupt function are configured

properly, the RF Transceiver will generate an interrupt signal on INT pin connected to the MCU I/O pin to get the atten-

tions from MCU and then the interrupt subroutine will be serviced. If the related interrupt control bits in host MCU are

not set properly, then the interrupt signal on RF Transceiver INT line will be a wake-up signal and no interrupt will be

serviced.

Using the RF Transceiver Function

To use the RF Transceiver function, several important steps must be implemented to ensure that the RF Transceiver

operates normally:

· The host MCU must be configured as the Master SPI. Therefore, the MCU SPI mode selection bits [M1, M0] in SPI

Interface Control Register can not be set to [1, 1] as slave mode.

· Although the SPI mode selection bits [M1, M0] can be set to [0, 0], [0, 1] and [1, 0], along with the SPI clock source

selection bit CKS, to force the host MCU SPI interface to operate as Master SPI with different baud rate, there are

some limitations on the maximum SPI clock speed that can be selected to be suitable for the RF Transceiver slave

SPI clock speed. As the maximum RF Transceiver slave SPI clock frequency is 5MHz, care must be taken for the

combinations of the SPI clock source selection CKS and mode selection [M1, M0] when the system clock fre-

quency is greater than 5MHz. For example, if the system clock operates at a frequency of 6MHz, the SPI mode se-

lection [M1, M0] and clock source selection CKS should not be set to [0, 0] and 0. Doing so will obtain a Master SPI

baud rate of 6MHz that is greater than the maximum clock frequency of the slave SPI which may result in SPI inter-

face malfunction.

¨ SPI Master/Slave/Baud rate selection bits in SBCR Register

Bit

Bit 6

Bit 5

Name

Value

00, 01, 10

00: SPI master mode; baud rate is fSPI

01: SPI master mode; baud rate is fSPI/4

10: SPI master mode; baud rate is fSPI/16

11: SPI slave mode

® can not be used

¨ SPI Clock source selection bit in SBCR Register

Bit

Bit 7

Name

CKS

Value

0, 1

0: fSPI =fSYS/2

1: fSPI =fSYS

· Since the MSB is first shifted in on SI line and shifted out on SO line for the RF Transceiver slave SPI read/write oper-

ations, the MSB/LSB selection bit MLS in MCU Master SPI SBCR register should be set to 1 for MSB shift first on

SDI/SDO lines.

¨ SPI MSB/LSB first selection bit in SBCR Register

Bit

Bit 5

Name

MLS

Setting value

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