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AS8218 датащи(PDF) 73 Page - ams AG |
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AS8218 датащи(HTML) 73 Page - ams AG |
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73 / 123 page ![]() Data Sheet AS8218 / AS8228 Revision 3.0, 31-May-06 Page 73 of 123 Example Pin List Pin Name Type Functionality Description EEP_S_N Input Chip select, active low When this input signal is High, the device is deselected and Serial Data Output (SO) is at high impedance. Unless an internal Write cycle is in progress, the device will be in the Standby mode. Driving Chip Select (S_N) Low enables the device, placing it in the active power mode. EEP_SO Output Serial data output This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of Serial Clock (SC). EEP_SI Input Serial data input This input signal is used to transfer data serially into the device. It receives instructions, addresses and the data to be written. Values are latched on the rising edge of Serial Clock (SC). EEP_SC Input Serial clock This input signal provides the timing of the serial interface. Instructions, addresses or data present at Serial Data Input (SI) are latched on the rising edge of Serial Clock (SC). Data on Serial Data Output (SO) changes after the falling edge of Serial Clock (SC). EEP_WP_N 1) Input Write protect, active low The main purpose of this input signal is to freeze the size of the area of memory that is protected against Write instructions (as specified by the values in the BP1 and BP0 bits of the Status register). This pin must be driven either High or Low and must be stable during all write operations. EEP_HOLD_N 1) Input Hold, active low The Hold (HOLD_N) signal is used to pause any serial communications with the device without deselecting the device. During the Hold condition, the Serial Data Output (SO) is high impedance, and Serial Data Input (SI) and Serial Clock (SC) are Don’t Care. To start the Hold condition, the device must be selected, with Chip Select (S_N) driven Low. EEP_VCC Supply Positive supply voltage EEP_VSS Supply Negative supply voltage Note: 1) No Write Protect (EEP_WP_N) and Hold (EEP_HOLD_N) pins are available on the AS8218 / AS8228 ICs. These pins must be tied ‘high’ directly at the EEPROM device. Instructions Timings Write Enable (WREN) Figure 14: Write enable (WREN) sequence EEP_S_N(in) EEP_SC(in) EEP_SI(in) EEP_SO(out ) |
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