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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ATmega328P датащи(PDF) 214 Page - ATMEL Corporation |
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ATmega328P датащи(HTML) 214 Page - ATMEL Corporation |
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214 / 448 page  214 8161D–AVR–10/09 ATmega48PA/88PA/168PA/328P 21. 2-wire Serial Interface 21.1 Features • Simple Yet Powerful and Flexible Communication Interface, only two Bus Lines Needed • Both Master and Slave Operation Supported • Device can Operate as Transmitter or Receiver • 7-bit Address Space Allows up to 128 Different Slave Addresses • Multi-master Arbitration Support • Up to 400 kHz Data Transfer Speed • Slew-rate Limited Output Drivers • Noise Suppression Circuitry Rejects Spikes on Bus Lines • Fully Programmable Slave Address with General Call Support • Address Recognition Causes Wake-up When AVR is in Sleep Mode • Compatible with Philips’ I2C protocol 21.2 2-wire Serial Interface Bus Definition The 2-wire Serial Interface (TWI) is ideally suited for typical microcontroller applications. The TWI protocol allows the systems designer to interconnect up to 128 different devices using only two bi-directional bus lines, one for clock (SCL) and one for data (SDA). The only external hard- ware needed to implement the bus is a single pull-up resistor for each of the TWI bus lines. All devices connected to the bus have individual addresses, and mechanisms for resolving bus contention are inherent in the TWI protocol. Figure 21-1. TWI Bus Interconnection Device 1 Device 2 Device 3 Device n SDA SCL ........ R1 R2 V CC |
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