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ATmega328P датащи(PDF) 16 Page - ATMEL Corporation |
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ATmega328P датащи(HTML) 16 Page - ATMEL Corporation |
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16 / 448 page ![]() 16 8161D–AVR–10/09 ATmega48PA/88PA/168PA/328P 7. AVR Memories 7.1 Overview This section describes the different memories in the ATmega48PA/88PA/168PA/328P. The AVR architecture has two main memory spaces, the Data Memory and the Program Memory space. In addition, the ATmega48PA/88PA/168PA/328P features an EEPROM Memory for data stor- age. All three memory spaces are linear and regular. 7.2 In-System Reprogrammable Flash Program Memory The ATmega48PA/88PA/168PA/328P contains 4/8/16/32K bytes On-chip In-System Repro- grammable Flash memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as 2/4/8/16K x 16. For software security, the Flash Program mem- ory space is divided into two sections, Boot Loader Section and Application Program Section in ATmega88PA and ATmega168PA. See SELFPRGEN description in section ”SPMCSR – Store Program Memory Control and Status Register” on page 292 for more details. The F lash memory has an endurance of at least 10,000 write/erase cycles. The ATmega48PA/88PA/168PA/328P Program Counter (PC) is 11/12/13/14 bits wide, thus address- ing the 2/4/8/16K program memory locations. The operation of Boot Program section and associated Boot Lock bits for software protection are described in detail in ”Self-Programming the Flash, ATmega48PA” on page 269 and ”Boot Loader Support – Read-While-Write Self-Pro- gramming, ATmega88PA, ATmega168PA and ATmega328P” on page 277. ”Memory Programming” on page 294 contains a detailed description on Flash Programming in SPI- or Parallel Programming mode. Constant tables can be allocated within the entire program memory address space (see the LPM – Load Program Memory instruction description). Timing diagrams for instruction fetch and execution are presented in ”Instruction Execution Tim- ing” on page 13. |
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