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STM32W108HB датащи(PDF) 48 Page - STMicroelectronics |
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STM32W108HB датащи(HTML) 48 Page - STMicroelectronics |
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48 / 179 page ![]() General-purpose input/outputs STM32W108CB, STM32W108HB 48/179 Doc ID 16252 Rev 2 Several GPIOs share an alternate output with Timer 2 and the Serial Controllers. Bits in Timer 2's TIM2_OR register control routing Timer 2 outputs to different GPIOs. Bits in Timer 2's TIM2_CCER register enable Timer 2 outputs. When Timer 2 outputs are enabled they override Serial Controller outputs. Table 5 indicates the GPIO mapping for Timer 2 outputs depending on the bits in the register TIM2_OR. Refer to Section 8: General-purpose timers on page 80 for complete information on timer configuration. For outputs assigned to the serial controllers, the serial interface mode registers (SCx_MODE) determine how the GPIO pins are used. The alternate outputs of PA4 and PA5 can either provide packet trace data (PTI_EN and PTI_DATA), or synchronous CPU trace data (TRACEDATA2 and TRACEDATA3). If a GPIO does not have an associated peripheral in alternate output mode, its output is set to 0. 6.1.3 Forced functions For some GPIOs the GPIO_PxCFGH/L configuration may be overridden. Table 6 shows the GPIOs that can have different functions forced on them regardless of the GPIO_PxCFGH/L registers. Note: The DEBUG_DIS bit in the GPIO_DBGCFG register can disable the Serial Wire/JTAG debugger interface. When this bit is set, all debugger-related pins (PC0, PC2, PC3, PC4) behave as standard GPIO. Table 5. Timer 2 output configuration controls Timer 2 Output Option Register Bit GPIO Mapping Selected by TIM2_OR Bit 01 TIM2_CH1 TIM2_OR[4] PA0 PB1 TIM2_CH2 TIM2_OR[5] PA3 PB2 TIM2_CH3 TIM2_OR[6] PA1 PB3 TIM2_CH4 TIM2_OR[7] PA2 PB4 Table 6. GPIO forced functions GPIO Override condition Forced function Forced signal PA7 GPIO_EXTREGEN bit set in the GPIO_DBGCFG register Open-drain output REG_EN PC0 Debugger interface is active in JTAG mode Input with pull up JRST PC2 Debugger interface is active in JTAG mode Push-pull output JTDO PC3 Debugger interface is active in JTAG mode Input with pull up JDTI PC4 Debugger interface is active in JTAG mode Input with pull up JTMS PC4 Debugger interface is active in Serial Wire mode Bidirectional (push-pull output or floating input) controlled by debugger interface SWDIO |
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