STM32W108HB datasheet(40/179 Pages) STMICROELECTRONICS

40 / 179 page

System modules

STM32W108CB, STM32W108HB

40/179

Doc ID 16252 Rev 2

See also Section 12.4.1: High frequency internal clock characteristics on page 161.

5.3.2

High-frequency crystal oscillator (OSC24M)

The high-frequency crystal oscillator (OSC24M) requires an external 24 MHz crystal with an

accuracy of ±40 ppm. Based upon the application's bill of materials and current

consumption requirements, the external crystal may cover a range of ESR requirements.

The crystal oscillator has a software-programmable bias circuit to minimize current

consumption. ST software configures the bias circuit for minimum current consumption.

All peripherals including the radio peripheral are fully functional using the OSC24M clock

source. Application software must be aware that peripherals are clocked at different speeds

depending on whether OSCHF or OSC24M is being used.

If the 24 MHz crystal fails, a hardware failover mechanism forces the system to switch back

to the high-frequency RC oscillator as the main clock source, and a non-maskable interrupt

(NMI) is signaled to the ARM® Cortex-M3 NVIC.

See also Section 12.4.2: High frequency external clock characteristics on page 161.

5.3.3

Low-frequency internal RC oscillator (OSCRC)

A low-frequency RC oscillator (OSCRC) is provided as an internal timing reference. The

nominal frequency coming out of reset is 10 kHz, and ST software calibrates this clock to

10 kHz. From the tuned 10 kHz oscillator (OSCRC) ST software calibrates a fractional-N

divider to produce a 1 kHz reference clock, CLK1K.

See also Section 12.4.3: Low frequency internal clock characteristics on page 162.

5.3.4

Low-frequency crystal oscillator (OSC32K)

A low-frequency 32.768 kHz crystal oscillator (OSC32K) is provided as an optional timing

reference for on-chip timers. This oscillator is designed for use with an external watch

crystal.

See also Section 12.4.4: Low frequency external clock characteristics on page 162.

5.3.5

Clock switching

The STM32W108 has two switching mechanisms for the main system clock, providing four

clock modes.

The register bit OSC24M_SEL in the OSC24M_CTRL register switches between the high-

frequency RC oscillator (OSCHF) and the high-frequency crystal oscillator (OSC24M) as

the main system clock (SCLK). The peripheral clock (PCLK) is always half the frequency of

SCLK.

The register bit CPU_CLK_SEL in the CPU_CLKSEL register switches between PCLK and

SCLK to produce the ARM® Cortex-M3 CPU clock (FCLK). The default and preferred mode

of operation is to run the CPU at the lower PCLK frequency, 12 MHz, but the higher SCLK

frequency, 24 MHz, can be selected to give higher processing performance at the expense

of an increase in power consumption.

In addition to these modes, further automatic control is invoked by hardware when flash

programming is enabled. To ensure accuracy of the flash controller's timers, the FCLK

frequency is forced to 12 MHz during flash programming and erase operations.

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