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STM32W108HB датащи(PDF) 37 Page - STMicroelectronics

номер детали STM32W108HB
подробное описание детали  High-performance, IEEE 802.15.4 wireless system-on-chip
PDF  179 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STM32W108HB датащи(HTML) 37 Page - STMicroelectronics

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STM32W108CB, STM32W108HB
System modules
Doc ID 16252 Rev 2
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Table 2 shows which reset sources generate certain resets.
5.2.4
Reset register
Reset event source register (RESET_EVENT)
Address offset: 0x4000 002C
Reset value: 0x0000 0001
Table 2.
Generated resets
Reset Source
Reset Generation
PORESET
SYSRESET
DAPRESET
PRESETHV
PRESETLV
POR HV
XXX
XX
POR LV (in deep sleep)
X
X
X
X
POR LV (not in deep
sleep)
XXX
XX
RSTB
XX
XX
Watchdog reset
X
X
X
Software reset
X
X
X
Option byte error
X
X
X
Normal deep sleep
X
X
X
X
Emulated deep sleep
X
X
Debug reset
X
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
rrr
rrr
r
r
r
r
r
r
r
r
r
r
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CPU_L
OCKU
P
OPT_B
YTE_F
AIL
WAKE_
UP_DS
LEEP
SW_R
ST
W_DO
G
RSTB_
PIN
POWE
R_LV
POWE
R_HV
rrr
rrr
r
r
r
r
r
r
r
r
r
r
7 CPU_LOCKUP: When set to ‘1’, the reset is due to core lockup.
6 OPT_BYTE_FAIL: When set to ‘1’, the reset is due to an Option byte load failure (may be set
with other bits).
5 WAKE_UP_DSLEEP: When set to ‘1’, the reset is due to a wake-up from Deep Sleep.
4 SW_RST: When set to ‘1’, the reset is due to a software reset.
3 W_DOG: When set to ‘1’, the reset is due to watchdog expiration.



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