GC4014 datasheet(27/46 Pages) TI

27 / 46 page

GRAYCHIP, INC.

- 22 -

APRIL 27, 1999

GC4014 QUAD RECEIVER CHIP

DATA SHEET REV 0.6

This document contains information which may be changed at any time without notice

5.11

TEST MODE REGISTER

ADDRESS 12:

Test Mode Register

, suggested default = 0x08, power up reset to 0.

BIT

TYPE

NAME

DESCRIPTION

0,1 LSB

R/W

DIAG_SOURCE

This two bit field selects the diagnostic input source used when the

DIAG bit in each channel’s control register is set (See Section 5.17).

DIAG_SOURCE = 0 selects the 14 LSB’s of the counter (see Section

5.10) as a diagnostic ramp. DIAG_SOURCE=1 is a zero input,

DIAG_SOURCE=2 is unused, DIAG_SOURCE= 3 gives a 0x4000

constant input.

2,3

R/W

DIAG_SYNC

The Checksum generator is strobed by this sync. See Table 4 for

the possible sync selections.

R/W

COUNT_TEST

Used during factory tests. Should be cleared during normal

operation.

R/W

PD_CLOCK_OFF

Turns off the clock in the power down mode.

6,7

R/W

POWER_DOWN

This two bit field controls the power down and keep alive circuit as

follows:

POWER_DOWN

MODE

Clock loss detect mode

Power down mode

Disabled

Test

The power_down mode defaults to 0 (clock loss detect mode) upon

power up.

5.12

PAGE MAP REGISTER

This register selects which page is been accessed by addresses 16 through 31. This register also contains

several miscellaneous control bits.

ADDRESS 13:

Page Map Register

BIT

TYPE

NAME

DESCRIPTION

0-3 LSBs

R/W

PAGE

The page selection. PAGE=0 selects the channel output data

page, PAGE=1 selects the status page, page=4,5,6 and 7 select

the channel control pages, pages 8,9,10 and 11 select the PFIR

coefficient pages.

R/W

NARROW

Selects the narrow mode CFIR coefficients.

R/W

DEC_BY_4

Enables the decimate by 4 mode of the PFIR.

R/W

16_BIT_INPUT

Enables the 16 bit input mode. DIN[6-13] are unused. DIN[0,1],

DIN[2,3], and DIN[4,5] become two additional LSB’s for AIN,

BIN, and CIN respectively.

7 MSB

R/W

MSB_POL

Invert the input MSB polarity. This will convert an offset binary

formatted input to 2’s complement format.

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