AD5522JSVDZ datasheet(35/60 Pages) AD

35 / 60 page

AD5522

Rev. A | Page 35 of 60

The calibration engine is engaged only when data is written to

the X1 register. The calibration engine is not engaged when data

is written to the M or C register. This has the advantage of

minimizing the initial setup time of the device. To calculate a

result that includes new M or C data, a write to X1 is required.

CACHED X2 REGISTERS

Each DAC has a number of cached X2 registers. These registers

store the result of a gain and offset calibration in advance of a mode

change. This enables the user to preload registers, allowing the

calibration engine to calculate the appropriate X2 value and store

it until a change in mode occurs. Because the data is ready and

held in the appropriate register, mode changing is as time efficient

as possible. If an update occurs to a DAC register set that is

currently part of the operating PMU mode, the DAC output is

updated immediately (depending on the LOAD condition).

Gain and Offset Registers for the FIN DAC

The force amplifier input (FIN) DAC level contains independent

gain and offset control registers that allow the user to digitally

trim gain and offset. There are six sets of X1, M, and C registers:

one set for the force voltage range and one set for each force

current range (four internal current ranges and one external

current range). Six X2 registers store the calculated DAC values,

ready to load to the DAC register upon a PMU mode change.

SERIAL I/F

FIN

X1 REG

CREG

MREG

×6

16-BIT

FIN DAC

OFFSET DAC

X2 REG

VREF

Figure 48. FIN DAC Registers

Gain and Offset Registers for the Comparator DACs

The comparator DAC levels contain independent gain and

offset control registers that allow the user to digitally trim gain

and offset. There are six sets of X1, M, and C registers: one set

for the force voltage mode and one set for each force current

range (four internal current ranges and one external current

range). In this way, X2 can be preprogrammed, which allows for

efficient switching into the required compare mode. Six X2

registers store the calculated DAC values, ready to load to the

DAC register upon a PMU mode change.

SERIAL I/F

CPL

X1 REG

CREG

MREG

×6

16-BIT

CPL DAC

X2 REG

VREF

CPH

X1 REG

CREG

MREG

×6

16-BIT

CPH DAC

X2 REG

Figure 49. Comparator Registers

Gain and Offset Registers for the Clamp DACs

The clamp DAC levels contain independent gain and offset

control registers that allow the user to digitally trim gain and

offset. There are two sets of X1, M, and C registers: one set for

the force voltage mode and one set for all five current ranges.

Two X2 registers store the calculated DAC values, ready to load

to the DAC register upon a PMU mode change.

SERIAL I/F

CLL

X1 REG

CREG

MREG

16-BIT

CLL DAC

X2 REG

VREF

CLH

X1 REG

CREG

MREG

16-BIT

CLH DAC

X2 REG

×2

Figure 50. Clamp Registers

REFERENCE VOLTAGE (VREF)

One buffered analog input, VREF, supplies all 21 DACs with the

necessary reference voltage to generate the required dc levels.

REFERENCE SELECTION

The voltage applied to the VREF pin determines the output

voltage range and span applied to the force amplifier, clamp, and

comparator inputs. The AD5522 can be used with a reference

input ranging from 2 V to 5 V; however, for most applications,

a reference input of 5 V or 2.5 V is sufficient to meet all voltage

range requirements. The DAC amplifier gain is 4.5, which gives

a DAC output span of 22.5 V. The DACs have gain and offset

registers that can be used to trim out system errors.

In addition, the gain register can be used to reduce the DAC

output range to the desired force voltage range. The FIN DAC

retains 16-bit resolution even with a gain register setting of

quarter scale (0x4000). Therefore, from a single 5 V reference,

it is possible to obtain a voltage span as high as 22.5 V or as low

as 5.625 V.

When using the gain and offset registers, the selected output

range should take into account the system gain and offset errors

that need to be trimmed out. Therefore, the selected output

range should be larger than the actual required range.

When using low supply voltages, ensure that there is sufficient

headroom and footroom for the required force voltage range.

Also, the forced current range is the quoted full-scale range only

with an applied reference of 5 V (ISENSE amplifier gain = 10) or

2.5 V (ISENSE amplifier gain = 5).

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