4513 datasheet(12/210 Pages) RENESAS

12 / 210 page

4513/4514 Group User’s Manual

vii

List of tables

CHAPTER 1 HARDWARE

Table Selection of system clock ................................................................................................ 1-11

Table 1 ROM size and pages .................................................................................................... 1-20

Table 2 RAM size ........................................................................................................................ 1-21

Table 3 Interrupt sources ............................................................................................................ 1-22

Table 4 Interrupt request flag, interrupt enable bit and skip instruction.............................. 1-22

Table 5 Interrupt enable bit function ......................................................................................... 1-22

Table 6 Interrupt control registers ............................................................................................. 1-24

Table 7 External interrupt activated conditions........................................................................ 1-26

Table 8 External interrupt control registers .............................................................................. 1-28

Table 9 Function related timers ................................................................................................. 1-30

Table 10 Timer control registers ................................................................................................ 1-32

Table 11 Serial I/O pins .............................................................................................................. 1-36

Table 12 Serial I/O mode register ............................................................................................. 1-36

Table 13 Processing sequence of data transfer from master to slave ................................ 1-40

Table 14 A-D converter characteristics ..................................................................................... 1-41

Table 15 A-D control registers ................................................................................................... 1-42

Table 16 Change of successive comparison register AD during A-D conversion .............. 1-43

Table 17 Voltage comparator characteristics ........................................................................... 1-47

Table 18 Voltage comparator control register Q3 ................................................................... 1-48

Table 19 Port state at reset ....................................................................................................... 1-50

Table 20 Functions and states retained at RAM back-up ..................................................... 1-53

Table 21 Return source and return condition .......................................................................... 1-54

Table 22 Key-on wakeup control register, pull-up control register, and interrupt control . 1-56

Table 23 Clock control register MR .......................................................................................... 1-57

Table 24 Maximum value of external clock oscillation frequency ......................................... 1-58

Table 25 Product of built-in PROM version ............................................................................. 1-88

Table 26 Programming adapters ................................................................................................ 1-89

CHAPTER 2 APPLICATION

Table 2.1.1 Pull-up control register PU0 .................................................................................... 2-4

Table 2.1.2 Key-on wakeup control register K0 ........................................................................ 2-5

Table 2.1.3 A-D control register Q2 ............................................................................................ 2-5

Table 2.1.4 Direction register FR0 .............................................................................................. 2-6

Table 2.1.5 Timer control register W6 ........................................................................................ 2-6

Table 2.1.6 connections of unused pins ................................................................................... 2-10

Table 2.2.1 Interrupt control register V1................................................................................... 2-14

Table 2.2.2 Interrupt control register V2................................................................................... 2-14

Table 2.2.3 Interrupt control register I1 .................................................................................... 2-15

Table 2.2.4 Interrupt control register I2 .................................................................................... 2-15

Table 2.3.1 Interrupt control register V1................................................................................... 2-27

Table 2.3.2 Interrupt control register V2................................................................................... 2-27

Table 2.3.3 Timer control register W1 ...................................................................................... 2-28

Table 2.3.4 Timer control register W2 ...................................................................................... 2-28

Table 2.3.5 Timer control register W3 ...................................................................................... 2-29

Table 2.3.6 Timer control register W4 ...................................................................................... 2-29

Table 2.4.1 Serial I/O mode register J1 ................................................................................... 2-41

Table 2.4.2 Recommended operating conditions (serial I/O) ................................................. 2-48

List of tables

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