4513 datasheet(75/210 Pages) RENESAS

75 / 210 page

1-62

HARDWARE

4513/4514 Group User’s Manual

SYMBOL

The symbols shown below are used in the following instruction function table and instruction list.

Symbol

PU0

FR0

PCH

PCL

Contents

A-D control register Q1 (4 bits)

A-D control register Q2 (4 bits)

Voltage comparator control register Q3 (4 bits)

Successive comparison register AD (10 bits)

Serial I/O mode register J1 (4 bits)

Serial I/O register SI (8 bits)

Interrupt control register V1 (4 bits)

Interrupt control register V2 (4 bits)

Interrupt control register I1 (4 bits)

Interrupt control register I2 (4 bits)

Timer control register W1 (4 bits)

Timer control register W2 (4 bits)

Timer control register W3 (4 bits)

Timer control register W4 (4 bits)

Timer control register W6 (4 bits)

Clock control register MR (4 bits)

Key-on wakeup control register K0 (4 bits)

Pull-up control register PU0 (4 bits)

Direction register FR0 (4 bits)

Data pointer (10 bits)

(It consists of registers X, Y, and Z)

Program counter (14 bits)

High-order 7 bits of program counter

Low-order 7 bits of program counter

Stack register (14 bits ! 8)

Stack pointer (3 bits)

Carry flag

Timer 1 reload register

Timer 2 reload register

Timer 3 reload register

Timer 4 reload register

Timer 1

Timer 2

Timer 3

Timer 4

Contents

Timer 1 interrupt request flag

Timer 2 interrupt request flag

Timer 3 interrupt request flag

Timer 4 interrupt request flag

Watchdog timer flag

Watchdog timer enable flag

Interrupt enable flag

External 0 interrupt request flag

External 1 interrupt request flag

Power down flag

A-D conversion completion flag

Serial I/O transmission/reception completion flag

Port D (8 bits)

Port P0 (4 bits)

Port P1 (4 bits)

Port P2 (3 bits)

Port P3 (4 bits)

Port P4 (4 bits)

Port P5 (4 bits)

Hexadecimal variable

Hexadecimal constant

Binary notation of hexadecimal variable A

(same for others)

Direction of data movement

Data exchange between a register and memory

Decision of state shown before “?”

Contents of registers and memories

Negate, Flag unchanged after executing instruction

RAM address pointed by the data pointer

Label indicating address a6 a5 a4 a3 a2 a1 a0

in page p5 p4 p3 p2 p1 p0

Hex. C + Hex. number x (also same for others)

Symbol

T1F

T2F

T3F

T4F

WDF1

WEF

INTE

EXF0

EXF1

ADF

SIOF

A3A2A1A0

←

↔

( )

—

M(DP)

p, a

Note : The 4513/4514 Group just invalidates the next instruction when a skip is performed. The contents of program counter is not increased by 2. Accord-

ingly, the number of cycles does not change even if skip is not performed. However, the cycle count becomes “1” if the TABP p, RT, or RTS instruction

is skipped.

SYMBOL

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