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4513 датащи(PDF) 108 Page - Renesas Technology Corp |
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4513 датащи(HTML) 108 Page - Renesas Technology Corp |
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108 / 210 page ![]() 4513/4514 Group User’s Manual APPLICATION 2-5 2.1 I/O pins (2) Key-on wakeup control register K0 Register K0 controls the ON/OFF of the key-on wakeup function of ports P00–P03 and P10–P13. Set the contents of this register through register A with the TK0A instruction. The contents of register K0 is transferred to register A with the TAK0 instruction. Table 2.1.2 shows the key-on wakeup control register K0. Table 2.1.2 Key-on wakeup control register K0 Key-on wakeup control register K0 at reset : 00002 at RAM back-up : state retained R/W Key-on wakeup not used Key-on wakeup used Key-on wakeup not used Key-on wakeup used Key-on wakeup not used Key-on wakeup used Key-on wakeup not used Key-on wakeup used Ports P12, P13 key-on wakeup control bit Ports P10, P11 key-on wakeup control bit Ports P02, P03 key-on wakeup control bit Ports P00, P01 key-on wakeup control bit 0 1 0 1 0 1 0 1 K03 K02 K01 K00 Note: “R” represents read enabled, and “W” represents write enabled. (3) A-D control register Q2 Bits 0 to 2 of register Q2 controls the pin function selection bits. Set the contents of this register through register A with the TQ2A instruction. The contents of register Q2 is transferred to register A with the TAQ2 instruction. Table 2.1.3 shows the A-D control register Q2. Table 2.1.3 A-D control register Q2 A-D control register Q2 at reset : 00002 at RAM back-up : state retained R/W A-D conversion mode Comparator mode P43, P42 (I/O) (Note 4) AIN7, AIN6/P43, P42 (Output) (Note 4) P41 (I/O) (Note 4) AIN5/P41 (Output) (Note 4) P40 (I/O) (Note 4) AIN4/P40 (Output) (Note 4) A-D operation mode control bit P43/AIN7, P42/AIN6 pin function selection bit (Note 3) P41/AIN5 pin function selection bit (Note 3) P40/AIN4 pin function selection bit (Note 3) 0 1 0 1 0 1 0 1 Q23 Q22 Q21 Q20 Notes 1: “R” represents read enabled, and “W” represents write enabled. 2: Select AIN4–AIN7 with register Q1 after setting register Q2. 3: For the 4513 Group, these bits are not used. 4: For the 4513 Group, only read/write of these bits is enabled. 5: When setting ports, Q23 is not used. |
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