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7906 датащи(PDF) 28 Page - Renesas Technology Corp |
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7906 датащи(HTML) 28 Page - Renesas Technology Corp |
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28 / 531 page ![]() 7906 Group User’s Manual Rev.2.0 2.1 Central processing unit (CPU) CENTRAL PROCESSING UNIT (CPU) 2-7 Fig. 2.1.5 Structure of processor mode register 1 0 1 6 to 2 7 RW RW RW RW 1 0 0 0 Processor mode register 1 (Address 5F16) Bit name Bit Function At reset R/W b7 b6 b5 b4 b3 b2 b1 b0 0 : Only DPR0 is used. 1 : DPR0 through DPR3 are used. 0 : 3 φ 1 : 2 φ (Note 1) This bit may be either “0” or “1.” Direct page register switch bit Fix these bits to “00000.” Internal ROM bus cycle select bit (Note 2) X : It may be either “0” or “1.” Notes 1: After reset, this bit is allowed to be changed only once. (During the software execution, be sure not to change this bit’s content.) 2: To reprogram the internal flash memory by using the CPU reprogramming mode, clear this bit to “0.” (Refer to section “19.2 Flash memory CPU reprogramming mode.”) X 0 00 0 0 |
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