7906 datasheet(7/531 Pages) RENESAS

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4. Register structure

The view of the register structure is described below:

XXX register (address XX16)

• • • select bit

• • • flag

Fix this bit to “0.”

This bit is invalid in … mode.

Nothing is assigned.

The value is “0” at reading.

b7 b6 b5 b4 b3 b2 b1 b0

0 : …

1 : …

0 : …

1 : …

The value is “0” at reading.

0 0 : …

0 1 : …

1 0 : …

1 1 : …

b2 b1

✽1

✽2

✽3

✽5

Undefined

✽6

—

✽1

Blank

: Set to “0” or “1” according to the usage.

: Set to “0” at writing.

: Set to “1” at writing.

: Invalid depending on the mode or state. It may be “0” or “1.”

: Nothing is assigned.

✽2

: “0” immediately after reset.

: “1” immediately after reset.

Undefined

: Undefined immediately after reset.

✽3

: It is possible to read the bit state at reading. The written value becomes valid.

: It is possible to read the bit state at reading. The written value becomes invalid. Accordingly, the written

value may be “0” or “1.”

: The written value becomes valid. It is impossible to read the bit state. The value is undefined at reading.

However, when [“0” at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at

reading. (See ✽5 above.)

—

: It is impossible to read the bit state. The value is undefined at reading.

However, when [“0” at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at

reading. (See ✽6 above.)

The written value becomes invalid. Accordingly, the written value may be “0” or “1.”

✽4

Invalid for that function or mode.

Bit name

Bit

Function

At reset

R/W

✽4

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