7906 datasheet(97/531 Pages) RENESAS

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7906 Group User’s Manual Rev.2.0

INTERRUPTS

6-18

Level sense/Edge sense

select bit (bit 5 at addresses

6E16, 6F16, FD16 to FF16)

6.10 External interrupts

The external interrupts consist of INTi interrupts.

6.10.1 INTi interrupt

An INTi (i = 3 to 7) interrupt request occurs by an input signal to pin INTi. Table 6.10.1 lists the occurrence

factor of the INTi interrupt request.

The allocation of pin INT3 can be changed by the pin INT3/RTPTRG0 select bit. (See Figure 6.10.1.)

When using any of pins P74(P27)/INT3, P55/INT5, P56/INT6, P57/INT7 as an input pin of the external interrupt,

be sure to clear the port direction register’s bit corresponding to the above pin. (See Figure 6.10.3.)

When using pin P6OUTCUT/INT4 as an input pin of an external interrupt (pin INT4), be sure to use port pins

P60 to P65 in the input mode. (Refer to section “5.2.3 Pin P6OUTCUT/INT4.”)

The signal input to pin INTi requires “H” or “L” level width of 250 ns or more, independent of f(XIN).

By reading out the INTi read bit (See Figure 6.10.2.), the state of pin INTi can be read out.

Note: Selection of the interrupt occurrence factor requires the following conditions:

• when an input signal’s falling edge or “L” level is selected, be sure that “L” level width

≥ 250 ns.

• when an input signal’s rising edge or “H” level is selected, be sure that “H” level width

≥ 250 ns.

6.10 External interrupts

Table 6.10.1 Occurrence factor of INTi interrupt request

Polarity select bit

(bit 4 at addresses 6E16,

6F16, FD16 to FF16)

The INTi interrupt request occurs by detecting the state of pin INTi all the time. Therefore, when the user

does not use an INTi interrupt, be sure to set the INTi interrupt’s priority level to 0.

INT3 to INT7

Occurrence factor of interrupt request

(An interrupt request occurs when the

input signal of pin INTi is as follows.)

Falling edge (Edge sense)

Rising edge (Edge sense)

“H” level (Level sense)

“L” level (Level sense)

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