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HD6432351 датащи(PDF) 313 Page - Renesas Technology Corp

номер детали HD6432351
подробное описание детали  16-Bit Single-Chip Microcomputer
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
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HD6432351 датащи(HTML) 313 Page - Renesas Technology Corp

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Section 7 DMA Controller (DMAC)
Rev. 3.00 Sep 15, 2006 page 279 of 988
REJ09B0330-0300
Figure 7.34 shows an example of single address transfer using the write data buffer function. In
this example, the CPU program area is in on-chip memory.
φ
Internal address
Internal read signal
RD
DACK
External address
DMA
read
DMA
single
CPU
read
DMA
single
CPU
read
Figure 7.34 Example of Single Address Transfer Using Write Data Buffer Function
When the write data buffer function is activated, the DMAC recognizes that the bus cycle
concerned has ended, and starts the next operation. Therefore,
DREQ pin sampling is started one
state after the start of the DMA write cycle or single address transfer.
7.5.13
DMAC Multi-Channel Operation
The DMAC channel priority order is: channel 0 > channel 1, and channel A > channel B. Table
7.13 summarizes the priority order for DMAC channels.
Table 7.13 DMAC Channel Priority Order
Short Address Mode
Full Address Mode
Priority
Channel 0A
Channel 0
High
Channel 0B
Channel 1A
Channel 1
Channel 1B
Low



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