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HD6432351 датащи(PDF) 230 Page - Renesas Technology Corp

номер детали HD6432351
подробное описание детали  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432351 датащи(HTML) 230 Page - Renesas Technology Corp

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Section 7 DMA Controller (DMAC)
Rev. 3.00 Sep 15, 2006 page 196 of 988
REJ09B0330-0300
• Module stop mode can be set
 The initial setting enables DMAC registers to be accessed. DMAC operation is halted by
setting module stop mode
7.1.2
Block Diagram
A block diagram of the DMAC is shown in figure 7.1.
Internal address bus
Address buffer
Processor
Internal interrupts
TGI0A
TGI1A
TGI2A
TGI3A
TGI4A
TGI5A
TXI0
RXI0
TXI1
RXI1
ADI
External pins
DREQ0
DREQ1
TEND0
TEND1
DACK0
DACK1
Interrupt signals
DEND0A
DEND0B
DEND1A
DEND1B
Control logic
DMAWER
DMACR1B
DMACR1A
DMACR0B
DMACR0A
DMATCR
DMABCR
Data buffer
Internal data bus
MAR0A
IOAR0A
ETCR0A
MAR0B
IOAR0B
ETCR0B
MAR1A
IOAR1A
ETCR1A
MAR1B
IOAR1B
ETCR1B
Legend:
: DMA write enable register
: DMA terminal control register
: DMA band control register (for all channels)
: DMA control register
: Memory address register
: I/O address register
: Executive transfer counter register
DMAWER
DMATCR
DMABCR
DMACR
MAR
IOAR
ETCR
Figure 7.1 Block Diagram of DMAC



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