HD6432351 datasheet(160/1025 Pages) RENESAS

160 / 1025 page

Section 6 Bus Controller

Rev. 3.00 Sep 15, 2006 page 126 of 988

REJ09B0330-0300

6.2

6.2.1

Bus Width Control Register (ABWCR)

ABW7

R/W

ABW6

R/W

ABW5

R/W

ABW4

R/W

ABW3

R/W

ABW0

R/W

ABW2

R/W

ABW1

R/W

Bit

Initial value :

Modes 1 to 3, 5 to 7*

Mode 4

Initial value :

ABWCR is an 8-bit readable/writable register that designates each area for either 8-bit access or

16-bit access.

ABWCR sets the data bus width for the external memory space. The bus width for on-chip

memory and internal I/O registers is fixed regardless of the settings in ABWCR.

In normal mode, the settings of bits ABW7 to ABW1 have no effect on operation.

After a power-on reset and in hardware standby mode, ABWCR is initialized to H'FF in modes 1,

2, 3, and 5, 6, 7*, and to H'00 in mode 4. It is not initialized by a manual reset or in software

standby mode.

Note: * Modes 2, 3, 6 and 7 only apply to the H8S/2351.

Bits 7 to 0—Area 7 to 0 Bus Width Control (ABW7 to ABW0): These bits select whether the

corresponding area is to be designated for 8-bit access or 16-bit access. In normal mode, only part

of area 0 is enabled, and the ABW0 bit selects whether external space is to be designated for 8-bit

access or 16-bit access.

Bit n

ABWn

Description

Area n is designated for 16-bit access

Area n is designated for 8-bit access

Note: n = 7 to 0

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