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M32C/8A датащи(PDF) 194 Page - Renesas Technology Corp |
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M32C/8A датащи(HTML) 194 Page - Renesas Technology Corp |
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194 / 372 page ![]() M32C/8A Group 15. Timers (Timer B) Rev.1.00 Jul 15, 2007 Page 177 of 352 REJ09B0385-0100 Figure 15.30 Operation in Pulse Width Measurement Mode (Timer B) i = 0 to 5 NOTES: 1. Counter is reset due to the completion of the measurement. 2. Overflow 3. To set the MR3 bit to 0 (no overflow), wait for one or more count source cycles to write a 0 to the TBiMR register after the MR3 bit becomes 1 (overflow), while the TBiS bit in TABSR or TBSR register is set to 1 (count starts). 4. Determine whether an interrupt source is a valid edge input or an overflow by reading the port level in the TBi interrupt routine. Pulse input to TBiIN pin TBiS bit in the TABSR or TBSR register “H” “L” 1 0 IR bit in the TBiIC register Transfer (undefined value) Transfer (measured value n) MR3 bit in the TBiMR register 1 0 1 0 2nd valid edge FFFFh n Contents of the counter n = contents of the reload register 0000h Transfer timing from counter to reload register Set to 0 by an interrupt acknowledgement or by program TBi register n Undefined value 10000h + n 1st valid edge (note1) (note2) (note1) (note 3) (note 4) (note 4) |
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