M16CSLASH29 datasheet(321/499 Pages) RENESAS

321 / 499 page

17. CAN Module

page 297

Figure 17.12 C0CONR Register

17.1.3.7 C0CONR Register

Figure 17.12

shows the C0CONR register.

C0CONR

Bit symbol

Bit name

Function

0: One time sampling

1: Three times sampling

0 0 0 0: Divide-by-1 of fCAN

0 0 0 1: Divide-by-2 of fCAN

0 0 1 0: Divide-by-3 of fCAN

1 1 1 0: Divide-by-15 of fCAN

1 1 1 1: Divide-by-16 of fCAN (1)

0 0 0: 1Tq

0 0 1: 2Tq

0 1 0: 2Tq

1 1 0: 7Tq

1 1 1: 8Tq

(b15)

(b8)

Bit symbol

Bit name

Function

Phase buffer

segment 1

control bits

Phase buffer

segment 2

control bits

Resynchronization

jump width

control bits

CAN0 Configuration Register(2)

C0CONR

b3 b2 b1 b0

b7 b6 b5

b2 b1b0

b5 b4 b3

b7 b6

021A16

NOTES:

1. fCAN serves for the CAN clock. The period is decided by configuration of the CCLKi bits (i = 0 to 2) in the CCLKR register.

Set the C0CONR register only when the CAN module is in CAN reset / initialization mode.

Symbol

Address

Symbol

Address

Prescaler division

ratio select bits

Propagation time

segment control bits

021B16

0 0 0: Do not set

0 0 1: 2Tq

0 1 0: 3Tq

1 1 0: 7Tq

1 1 1: 8Tq

0 0 0: Do not set

0 0 1: 2Tq

0 1 0: 3Tq

1 1 0: 7Tq

1 1 1: 8Tq

0 0: 1Tq

0 1: 2Tq

1 0: 3Tq

1 1: 4Tq

After reset

Undefined

After Reset

Undefined

BRP

SAM

PTS

PBS1

PBS2

SJW

Sampling control bit

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