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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M16C/29 датащи(PDF) 176 Page - Renesas Technology Corp |
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M16C/29 датащи(HTML) 176 Page - Renesas Technology Corp |
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176 / 499 page  13. Timer S p u o r G 9 2 / C 6 1 M page 152 8 5 4 f o 7 0 0 2 , 0 3 .r a M 2 1 . 1 . v e R 2 1 1 0 - 1 0 1 0 B 9 0 J E R Table 13.3 Base Timer Associated Register Settings (Time Measurement Function, Waveform Generation Function, Communication Function) Register Bit Function G1BCR0 BCK1 to BCK0 Select a count source RST4 Select base timer reset timing IT Select the base timer overflow G1BCR1 RST2 to RST1 Select base timer reset timing BTS Used to start the base timer UD1 to UD0 Select how to count G1BT - Read or write base timer value G1DV - Divide ratio of a count source Set the following registers to set the RST1 bit to 1 (base timer reset by matching the base timer with the G1PO0 register) G1POCR0 MOD1 to MOD0 Set to 002 (single-phase waveform output mode) G1PO0 - Set reset cycle G1FS FSC0 Set to 0 (waveform generating function) G1FE IFE0 Set to 1 (channel operation start) Figure 13.11 Base Timer Block Diagram (n+1) divider RST4 RST1 RST2 Matched with G1BTRR Matched with G1PO0 register Base timer b14 b15 Base timer overflow request BCK1 to BCK0 IT BTS bit in G1BCR1 register Two-phase pulse input Overflow signal Input "L" to INT1 pin Base timer reset 11 10 0 1 fBT1 NOTE: 1. Divider is reset when the BTS bit is set to 0. IT, RST4, BCK1 to BCK0: Bits in the G1BCR0 register RST2 to RST1: Bits in the G1BCR1 register (Note 1) f1 or f2 |
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